Datasheet ADP160, ADP161, ADP162, ADP163 (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | Ultralow Quiescent Current, 150 mA, CMOS Linear Regulators |
| Páginas / Página | 24 / 5 — Data Sheet. ADP160/ADP161/ADP162/ADP163. ABSOLUTE MAXIMUM RATINGS. Table … |
| Revisión | H |
| Formato / tamaño de archivo | PDF / 605 Kb |
| Idioma del documento | Inglés |
Data Sheet. ADP160/ADP161/ADP162/ADP163. ABSOLUTE MAXIMUM RATINGS. Table 3. Parameter. Rating. THERMAL DATA. THERMAL RESISTANCE
Línea de modelo para esta hoja de datos
- ADP160ACBZ-1.2-R7 ADP160ACBZ-1.5-R7 ADP160ACBZ-1.8-R7 ADP160ACBZ-2.1-R7 ADP160ACBZ-2.3-R7 ADP160ACBZ-2.5-R7 ADP160ACBZ-2.7-R7 ADP160ACBZ-2.75-R7 ADP160ACBZ-2.8-R7 ADP160ACBZ-2.85-R7 ADP160ACBZ-3.0-R7 ADP160ACBZ-3.3-R7 ADP160ACBZ-4.2-R7 ADP160AUJZ-1.2-R7 ADP160AUJZ-1.5-R7 ADP160AUJZ-1.8-R7 ADP160AUJZ-2.3-R7 ADP160AUJZ-2.5-R7 ADP160AUJZ-2.7-R7 ADP160AUJZ-2.8-R7 ADP160AUJZ-3.0-R7 ADP160AUJZ-3.3-R7 ADP160AUJZ-4.2-R7
- ADP162ACBZ-1.2-R7 ADP162ACBZ-1.8-R7 ADP162ACBZ-2.1-R7 ADP162ACBZ-2.3-R7 ADP162ACBZ-2.8-R7 ADP162ACBZ-3.0-R7 ADP162ACBZ-3.2-R7 ADP162ACBZ-4.2-R7 ADP162AUJZ-1.5-R7 ADP162AUJZ-1.8-R7 ADP162AUJZ-2.3-R7 ADP162AUJZ-2.5-R7 ADP162AUJZ-2.7-R7 ADP162AUJZ-2.8-R7 ADP162AUJZ-3.0-R7 ADP162AUJZ-3.1-R7 ADP162AUJZ-3.3-R7 ADP162AUJZ-4.2-R7
Versión de texto del documento
Data Sheet ADP160/ADP161/ADP162/ADP163 ABSOLUTE MAXIMUM RATINGS
Junction-to-ambient thermal resistance (θJA) of the package is
Table 3.
based on modeling and calculation using a 4-layer board. The
Parameter Rating
junction-to-ambient thermal resistance is highly dependent on the VIN to GND −0.3 V to +6.5 V application and board layout. In applications where high maximum VOUT to GND −0.3 V to VIN power dissipation exists, close attention to thermal board design EN to GND −0.3 V to VIN is required. The value of θJA may vary, depending on PCB material, ADJ to GND −0.3 V to VIN layout, and environmental conditions. The specified values of NC to GND −0.3 V to VIN θJA are based on a 4-layer, 4 inches × 3 inches, circuit board. Refer Storage Temperature Range −65°C to +150°C to JESD 51-7 and JESD 51-9 for detailed information on the Operating Junction Temperature Range −40°C to +125°C board construction. For additional information, see the AN-617 Operating Ambient Temperature Range −40°C to +125°C Application Note, MicroCSP™ Wafer Level Chip Scale Package. Soldering Conditions JEDEC J-STD-020 ΨJB is the junction to board thermal characterization parameter Stresses above those listed under Absolute Maximum Ratings with units of °C/W. ΨJB of the package is based on modeling and may cause permanent damage to the device. This is a stress calculation using a 4-layer board. The JESD51-12, Guidelines for rating only; functional operation of the device at these or any Reporting and Using Electronic Package Thermal Information, other conditions above those indicated in the operational states that thermal characterization parameters are not the same section of this specification is not implied. Exposure to absolute as thermal resistances. ΨJB measures the component power flowing maximum rating conditions for extended periods may affect through multiple thermal paths rather than a single path as in device reliability. thermal resistance, θJB. Therefore, ΨJB thermal paths include
THERMAL DATA
convection from the top of the package as well as radiation from the package, factors that make ΨJB more useful in real-world Absolute maximum ratings only apply individually; they do not applications. Maximum junction temperature (TJ) is calculated apply in combination. The ADP16x can be damaged when the from the board temperature (TB) and power dissipation (PD) junction temperature limits are exceeded. Monitoring ambient using the formula temperature does not guarantee that TJ is within the specified T temperature limits. In applications with high power dissipation J = TB + (PD × ΨJB) and poor thermal resistance, the maximum ambient temperature Refer to JESD51-8 and JESD51-12 for more detailed information may have to be derated. about ΨJB. In applications with moderate power dissipation and low PCB
THERMAL RESISTANCE
thermal resistance, the maximum ambient temperature can θJA and ΨJB are specified for the worst-case conditions, that is, a exceed the maximum limit as long as the junction temperature device soldered in a circuit board for surface-mount packages. is within specification limits. The junction temperature (TJ) of the device is dependent on the ambient temperature (T
Table 4. Thermal Resistance
A), the power dissipation of the device (PD), and the junction-to-ambient
Package Type θJA ΨJB Unit
thermal resistance of the package (θJA). 5-Lead TSOT 170 43 °C/W Maximum junction temperature (T 4-Ball, 0.4 mm Pitch WLCSP 260 58 °C/W J) is calculated from the ambient temperature (TA) and power dissipation (PD) using the formula TJ = TA + (PD × θJA)
ESD CAUTION
Rev. H | Page 5 of 24 Document Outline Features Applications Typical Application Circuits General Description Table of Contents Revision History Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Applications Information Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Enable Feature Current Limit and Thermal Overload Protection Thermal Considerations PCB Layout Considerations Light Sensitivity of WLCSPs Outline Dimensions Ordering Guide
Junction-to-ambient thermal resistance (θJA) of the package is
Table 3.
based on modeling and calculation using a 4-layer board. The
Parameter Rating
junction-to-ambient thermal resistance is highly dependent on the VIN to GND −0.3 V to +6.5 V application and board layout. In applications where high maximum VOUT to GND −0.3 V to VIN power dissipation exists, close attention to thermal board design EN to GND −0.3 V to VIN is required. The value of θJA may vary, depending on PCB material, ADJ to GND −0.3 V to VIN layout, and environmental conditions. The specified values of NC to GND −0.3 V to VIN θJA are based on a 4-layer, 4 inches × 3 inches, circuit board. Refer Storage Temperature Range −65°C to +150°C to JESD 51-7 and JESD 51-9 for detailed information on the Operating Junction Temperature Range −40°C to +125°C board construction. For additional information, see the AN-617 Operating Ambient Temperature Range −40°C to +125°C Application Note, MicroCSP™ Wafer Level Chip Scale Package. Soldering Conditions JEDEC J-STD-020 ΨJB is the junction to board thermal characterization parameter Stresses above those listed under Absolute Maximum Ratings with units of °C/W. ΨJB of the package is based on modeling and may cause permanent damage to the device. This is a stress calculation using a 4-layer board. The JESD51-12, Guidelines for rating only; functional operation of the device at these or any Reporting and Using Electronic Package Thermal Information, other conditions above those indicated in the operational states that thermal characterization parameters are not the same section of this specification is not implied. Exposure to absolute as thermal resistances. ΨJB measures the component power flowing maximum rating conditions for extended periods may affect through multiple thermal paths rather than a single path as in device reliability. thermal resistance, θJB. Therefore, ΨJB thermal paths include
THERMAL DATA
convection from the top of the package as well as radiation from the package, factors that make ΨJB more useful in real-world Absolute maximum ratings only apply individually; they do not applications. Maximum junction temperature (TJ) is calculated apply in combination. The ADP16x can be damaged when the from the board temperature (TB) and power dissipation (PD) junction temperature limits are exceeded. Monitoring ambient using the formula temperature does not guarantee that TJ is within the specified T temperature limits. In applications with high power dissipation J = TB + (PD × ΨJB) and poor thermal resistance, the maximum ambient temperature Refer to JESD51-8 and JESD51-12 for more detailed information may have to be derated. about ΨJB. In applications with moderate power dissipation and low PCB
THERMAL RESISTANCE
thermal resistance, the maximum ambient temperature can θJA and ΨJB are specified for the worst-case conditions, that is, a exceed the maximum limit as long as the junction temperature device soldered in a circuit board for surface-mount packages. is within specification limits. The junction temperature (TJ) of the device is dependent on the ambient temperature (T
Table 4. Thermal Resistance
A), the power dissipation of the device (PD), and the junction-to-ambient
Package Type θJA ΨJB Unit
thermal resistance of the package (θJA). 5-Lead TSOT 170 43 °C/W Maximum junction temperature (T 4-Ball, 0.4 mm Pitch WLCSP 260 58 °C/W J) is calculated from the ambient temperature (TA) and power dissipation (PD) using the formula TJ = TA + (PD × θJA)
ESD CAUTION
Rev. H | Page 5 of 24 Document Outline Features Applications Typical Application Circuits General Description Table of Contents Revision History Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Applications Information Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Enable Feature Current Limit and Thermal Overload Protection Thermal Considerations PCB Layout Considerations Light Sensitivity of WLCSPs Outline Dimensions Ordering Guide