Datasheet ADP322, ADP323 (Analog Devices) - 4

ADP322/ADP323 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit
EN INPUT EN Input Logic High VIH 2.5 V ≤ VBIAS ≤ 5.5 V 1.2 V EN Input Logic Low VIL 2.5 V ≤ VBIAS ≤ 5.5 V 0.4 V EN Input Leakage Current VI-LEAKAGE EN1 = EN2 = EN3 = VIN or GND 0.1 µA EN1 = EN2 = EN3 = VIN or GND, 1 µA TJ = −40°C to +125°C UNDERVOLTAGE LOCKOUT UVLO Input Bias Voltage (VBIAS) UVLORISE 2.45 V Rising Input Bias Voltage (VBIAS) UVLOFALL 2.0 V Falling Hysteresis UVLOHYS 180 mV OUTPUT NOISE OUTNOISE 10 Hz to 100 kHz, VIN = 5 V, VOUT = 3.3 V 50 µV rms 10 Hz to 100 kHz, VIN = 5 V, VOUT = 2.8 V 43 µV rms 10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 2.5 V 40 µV rms 10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 1.2 V 24 µV rms 10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 0.5 V 14 µV rms POWER SUPPLY REJECTION RATIO PSRR VIN = 1.8 V, VOUT = 0.8 V, IOUT = 100 mA 100 Hz 70 dB 1 kHz 70 dB 10 kHz 70 dB 100 kHz 60 dB 1 MHz 40 dB VIN = 3.3 V, VOUT = 2.8 V, IOUT = 100 mA 100 Hz 68 dB 1 kHz 62 dB 10 kHz 68 dB 100 kHz 60 dB 1 MHz 40 dB 1 Accuracy when VOUTx is connected directly to FBx. When the VOUTx voltage is set by external feedback resistors, the absolute accuracy in adjust mode depends on the tolerances of the resistors used. 2 Based on an end point calculation using 1 mA and 200 mA loads. 3 The dropout voltage specification applies only to output voltages greater than 1.8 V. Dropout voltage is defined as the input to output voltage differential when the input voltage is set to the nominal output voltage. 4 Start-up time is defined as the time between the rising edge of ENx to VOUTx being at 90% of its nominal value. 5 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, that is, 2.7 V.
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
MINIMUM INPUT AND OUTPUT CAPACITANCE1 CMIN TA = −40°C to +125°C 0.70 µF CAPACITOR ESR RESR TA = −40°C to +125°C 0.001 1 Ω 1 The minimum input and output capacitance must be greater than 0.70 µF over the full range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with LDOs. Rev. E | Page 4 of 24 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT ENABLE FEATURE NOISE REDUCTION OF THE ADP323 IN ADJUSTABLE MODE CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE NOTES