Datasheet ADP7102 (Analog Devices) - 5

Data Sheet ADP7102 ABSOLUTE MAXIMUM RATINGS Table 3.
In applications where high maximum power dissipation exists, close attention to thermal board design is required. The value of θ
Parameter Rating
JA may vary, depending on PCB material, layout, and environmental VIN to GND −0.3 V to +22 V conditions. The specified values of θ VOUT to GND −0.3 V to +20 V JA are based on a 4-layer, 4 in. × 3 in. circuit board. See JESD51-7 and JESD51-9 for detailed EN/UVLO to GND −0.3 V to VIN information on the board construction. For additional information, PG to GND −0.3 V to VIN see the AN-617 Application Note, MicroCSP Wafer Level Chip SENSE/ADJ to GND −0.3 V to VOUT Scale Package. Storage Temperature Range −65°C to +150°C Operating Junction Temperature Range −40°C to +125°C ΨJB is the junction to board thermal characterization parameter Soldering Conditions JEDEC J-STD-020 with units of °C/W. The package’s ΨJB is based on modeling and calculation using a 4-layer board. The JESD51-12, Guidelines Stresses at or above those listed under Absolute Maximum for Reporting and Using Electronic Package Thermal Information, Ratings may cause permanent damage to the product. This is a states that thermal characterization parameters are not the same stress rating only; functional operation of the product at these as thermal resistances. Ψ or any other conditions above those indicated in the operational JB measures the component power flowing through multiple thermal paths rather than a single section of this specification is not implied. Operation beyond path as in thermal resistance, θJB. Therefore, ΨJB thermal paths the maximum operating conditions for extended periods may include convection from the top of the package as well as radiation affect product reliability. from the package, factors that make ΨJB more useful in real-world
THERMAL DATA
applications. Maximum junction temperature (TJ) is calculated Absolute maximum ratings apply individually only, not in from the board temperature (TB) and power dissipation (PD) combination. The ADP7102 can be damaged when the junction using the formula temperature limit is exceeded. Monitoring ambient temperature TJ = TB + (PD × ΨJB) does not guarantee that TJ is within the specified temperature See JESD51-8 and JESD51-12 for more detailed information limits. In applications with high power dissipation and poor about ΨJB. thermal resistance, the maximum ambient temperature may have to be derated.
Thermal Resistance
In applications with moderate power dissipation and low θJA and ΨJB are specified for the worst case conditions, that is, a printed circuit board (PCB) thermal resistance, the maximum device soldered in a circuit board for surface-mount packages. ambient temperature can exceed the maximum limit as long as θJC is a parameter for surface-mount packages with top mounted the junction temperature is within specification limits. The heat sinks. θJC is presented here for reference only. junction temperature (TJ) of the device is dependent on the
Table 4. Thermal Resistance
ambient temperature (TA), the power dissipation of the device
Package Type θJA θJC ΨJB Unit
(PD), and the junction to ambient thermal resistance of the 8-Lead LFCSP 40.1 27.1 17.2 °C/W package (θJA). 8-Lead SOIC 48.5 58.4 31.3 °C/W Maximum junction temperature (TJ) is calculated from the
ESD CAUTION
ambient temperature (TA) and power dissipation (PD) using the formula TJ = TA + (PD × θJA) Junction to ambient thermal resistance (θJA) of the package is based on modeling and calculation using a 4-layer board. The junction to ambient thermal resistance is highly dependent on the application and board layout. Rev. E | Page 5 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA Thermal Resistance ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties PROGRAMABLE UNDERVOLTAGE LOCKOUT (UVLO) POWER-GOOD FEATURE NOISE REDUCTION OF THE ADJUSTABLE ADP7102 CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE