Datasheet ADP7104 (Analog Devices) - 5

FabricanteAnalog Devices
Descripción20 V, 500 mA, Low Noise, CMOS LDO
Páginas / Página25 / 5 — Data Sheet. ADP7104. ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating. …
RevisiónI
Formato / tamaño de archivoPDF / 1.3 Mb
Idioma del documentoInglés

Data Sheet. ADP7104. ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating. THERMAL DATA. THERMAL RESISTANCE

Data Sheet ADP7104 ABSOLUTE MAXIMUM RATINGS Table 3 Parameter Rating THERMAL DATA THERMAL RESISTANCE

Línea de modelo para esta hoja de datos

Versión de texto del documento

Data Sheet ADP7104 ABSOLUTE MAXIMUM RATINGS Table 3.
on PCB material, layout, and environmental conditions. The specified values of θ
Parameter Rating
JA are based on a 4-layer, 4 in. × 3 in. circuit board. See JESD51-7 and JESD51-9 for detailed information VIN to GND −0.3 V to +22 V on the board construction. For additional information, see the VOUT to GND −0.3 V to +20 V AN-617 Application Note. EN/UVLO to GND −0.3 V to VIN PG to GND −0.3 V to VIN ΨJB is the junction-to-board thermal characterization parameter SENSE/ADJ to GND −0.3 V to VOUT with units of °C/W. The package’s ΨJB is based on modeling and Storage Temperature Range −65°C to +150°C calculation using a 4-layer board. The JESD51-12, Guidelines for Operating Junction Temperature Range −40°C to +125°C Reporting and Using Electronic Package Thermal Information, Soldering Conditions JEDEC J-STD-020 states that thermal characterization parameters are not the same as thermal resistances. ΨJB measures the component power Stresses at or above those listed under Absolute Maximum flowing through multiple thermal paths rather than a single Ratings may cause permanent damage to the product. This is a path as in thermal resistance, θJB. Therefore, ΨJB thermal paths stress rating only; functional operation of the product at these include convection from the top of the package as well as or any other conditions above those indicated in the operational radiation from the package, factors that make ΨJB more useful section of this specification is not implied. Operation beyond in real-world applications. Maximum junction temperature (TJ) the maximum operating conditions for extended periods may is calculated from the board temperature (TB) and power affect product reliability. dissipation (PD) using the formula
THERMAL DATA
TJ = TB + (PD × ΨJB) Absolute maximum ratings apply individually only, not in combination. The ADP7104 can be damaged when the junction See JESD51-8 and JESD51-12 for more detailed information temperature limit is exceeded. Monitoring ambient temperature about ΨJB. does not guarantee that TJ is within the specified temperature limits. In applications with high power dissipation and poor
THERMAL RESISTANCE
thermal resistance, the maximum ambient temperature may θJA and ΨJB are specified for the worst-case conditions, that is, a have to be derated. device soldered in a circuit board for surface-mount packages. θJC In applications with moderate power dissipation and low PCB is a parameter for surface-mount packages with top mounted thermal resistance, the maximum ambient temperature can heatsinks. θJC is presented here for reference only. exceed the maximum limit as long as the junction temperature is within specification limits. The junction temperature (T
Table 4. Thermal Resistance
J) of the device is dependent on the ambient temperature (T
Package Type θ
A), the
JA θJC ΨJB Unit
power dissipation of the device (PD), and the junction-to-ambient 8-Lead LFCSP 40.1 27.1 17.2 °C/W thermal resistance of the package (θJA). 8-Lead SOIC 48.5 58.4 31.3 °C/W Maximum junction temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) using the
ESD CAUTION
formula TJ = TA + (PD × θJA) Junction-to-ambient thermal resistance (θJA) of the package is based on modeling and calculation using a 4-layer board. The junction-to-ambient thermal resistance is highly dependent on the application and board layout. In applications where high maximum power dissipation exists, close attention to thermal board design is required. The value of θJA may vary, depending Rev. I | Page 5 of 25 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties PROGRAMMABLE UNDERVOLTAGE LOCKOUT (UVLO) POWER-GOOD FEATURE NOISE REDUCTION OF THE ADJUSTABLE ADP7104 CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE