link to page 2 link to page 6 link to page 6 link to page 16 link to page 6 link to page 6 LT3040 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 10: Parasitic diodes exist internally between the ILIM, VIN, FS, FAULT, may cause permanent damage to the device. Exposure to any Absolute VFB and OUT pins and the GND pin. Do not drive these pins more than Maximum Rating condition for extended periods may affect device 0.3V below the GND pin during a fault condition. These pins must remain reliability and lifetime. at a voltage more positive than GND during normal operation. Note 2: The EN/UV pin threshold must be met to ensure device operation. Note 11: The current limit programming scale factor is specified while the Note 3: Maximum junction temperature limits operating conditions. The internal backup current limit is not active. Note that the internal current regulated output voltage specification does not apply for all possible limit has foldback protection for V+ – VOUT differentials greater than 12V combinations of supply voltage and output current, especially due to Note 12: The internal back-up current limit circuitry incorporates fold-back the internal current limit foldback that starts to decrease current limit at protection that decreases current limit for V+ – VOUT > 12V. Some level of V+ – VOUT > 12V. If operating at maximum output current, limit the supply output current is provided at all V+ – VOUT differential voltages. Consult the voltage range. If operating at the maximum supply voltage, limit the output Typical Performance Characteristics graph for current limit vs V+ – VOUT. current range. Note 13: For an output voltage less then 1V, the LT3040 requires a 10µA Note 4: VFB tied directly to OUT. minimum load current for stability. Note 5: Dropout voltage is the minimum supply-to-output differential Note 14: Maximum OUT-to-VFB differential is guaranteed by design. voltage needed to maintain regulation at a specified output current. The Note 15: The bias current cancellation circuit used to cancel any IR drop dropout voltage is measured when output is 1% out of regulation. This across external resistors does not operate for VIN pin voltages below definition results in higher dropout voltage compared to hard dropout— 100mV due to circuit limitations. As a result, the bias current increases which is measured when V+ = VOUT(NOMINAL). For lower output voltages, exponentially below this voltage. See Typical Performance Characteristics below 1.5V, dropout voltage is limited by the minimum supply voltage Note 16: The Offset Voltage specification does not include the effects of specification. Analog Devices is unable to guarantee maximum dropout line and load regulation. voltage specifications for DFN package at high currents due to production test limitations with Kelvin sensing the package pins. Please consult the Note 17: Deviations in output voltage from the reference setpoint are Typical Performance Characteristics for curves of dropout voltage as a cumulative; errors in output regulation due to offset, line and load function of output load current and temperature measured in a typical regulation add up. application circuit. Note 18: Hysteresis in the offset voltage is created by package stress Note 6: GND pin current is tested with V+ = V that differs depending on whether the IC was previously at a higher OUT(NOMINAL) and a current source load. Therefore, the device is tested while operating in dropout. or lower temperature. Offset voltage is always measured at 25°C, but This is the worst-case GND pin current. GND pin current decreases at the IC is cycled to the hot or cold temperature limit before successive higher supply voltages. Note that GND pin current does not include ILIM measurements. Hysteresis measures the maximum output change for pin current but quiescent current does include it. the averages of three hot or cold temperature cycles. For instruments that are stored at well controlled temperatures (within 20 to 30 degrees Note 7: VIN and VFB pins are clamped using diodes and two 25Ω series of operational temperature), it’s usually not a dominant error source. resistors. For less than 5ms transients, this clamp circuitry can carry more Typical hysteresis is the worst-case of 25°C to cold to 25°C to hot to 25°C, than the rated current. See Typical Performance Characteristics and refer preconditioned by one thermal cycle. to Applications Information for more information. Note 19: To achieve rail-to-rail output operation, LT3040 uses either a PNP Note 8: Adding a capacitor at the VIN pin decreases output voltage noise. or a NPN input differential pair. There is a transition from the PNP to NPN Adding this capacitor bypasses the reference voltage source’s or the DAC’s differential pair at around the 0.9V with a typical hysteresis of about 35mV. noise. The output noise then equals the error amplifier noise. Use of a VIN See Applications Section for more information. pin bypass capacitor also increases start-up time. Note 20: Long-term stability typically has a logarithmic characteristic. Note 9: The LT3040 is tested and specified under pulsed load conditions Changes after 1000 hours tend to be much smaller than before that time. such that TJ ≈ TA. The LT3040E is 100% tested at 25°C and performance Total drift in the second thousand hours is normally less than one-third is guaranteed from 0°C to 125°C. Specifications over the –40°C to 125°C that of the first thousand hours with a continuing trend toward reduced operating temperature range are assured by design, characterization and drift with time. Long-term stability is also affected by differential stresses correlation with statistical process controls. The LT3040I is guaranteed between the IC and the board material created during board assembly. over the full –40°C to 125°C operating temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at Note 21: Dropout voltage measurements are done by forcing a voltage at junction temperatures greater than 125°C. the VIN pin. Rev. 0 For more information www.analog.com 5 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Typical Application Related Parts