Datasheet ADCMP567 (Analog Devices) - 6

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ADCMP567 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS D N DD DD G LEA LEA NC V QA QA V 32 31 30 29 28 27 26 25 GND 1 24 V PIN 1 EE –INA 2 23 NC INDICATOR +INA 3 22 VEE V 4 ADCMP567 21 V CC CC V 5 20 V CC TOP VIEW CC +INB 6 19 VEE (Not to Scale) –INB 7 18 NC GND 8 17 VEE 9 5 10 11 12 13 14 1 16 D B B NC DD QB QB DD GN LE LE V V NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
02
NOTES
0
1. THE RECOMMENDED CONNECTION FOR THE
632-
EXPOSED PAD IS GROUND.
03 Figure 2. ADCMP567 Pin Configuration
Table 3. ADCMP567 Pi n Function Descriptions Pin No. Mnemonic Function
1 GND Analog Ground. 2 −INA Inverting analog input of the differential input stage for Channel A. The inverting A input must be driven in conjunction with the noninverting A input. 3 +INA Noninverting analog input of the differential input stage for Channel A. The noninverting A input must be driven in conjunction with the inverting A input. 4 VCC Positive Supply Terminal. 5 VCC Positive Supply Terminal. 6 +INB Noninverting analog input of the differential input stage for Channel B. The noninverting B input must be driven in conjunction with the inverting B input. 7 −INB Inverting analog input of the differential input stage for Channel B. The inverting B input must be driven in conjunction with the noninverting B input. 8 GND Analog Ground. 9 GND Analog Ground. 10 LEB One of two complementary inputs for Channel B Latch Enable. In the compare mode (logic low), the output will track changes at the input of the comparator. In the latch mode (logic high), the output will reflect the input state just prior to the comparator’s being placed in the latch mode. LEB must be driven in conjunction with LEB. 11 LEB One of two complementary inputs for Channel B Latch Enable. In the compare mode (logic high), the output will track changes at the input of the comparator. In the latch mode (logic low), the output will reflect the input state just prior to the comparator’s being placed in the latch mode. LEB must be driven in conjunction with LEB. 12 NC No Connect. Do not connect to this pin. 13 VDD Logic Supply Terminal. 14 QB One of two complementary outputs for Channel B. QB will be at logic low if the analog voltage at the noninverting input is greater than the analog voltage at the inverting input (provided the comparator is in the compare mode). See the LEB description (Pin 11) for more information. 15 QB One of two complementary outputs for Channel B. QB will be at logic high if the analog voltage at the noninverting input is greater than the analog voltage at the inverting input (provided the comparator is in the compare mode). See the LEB description (Pin 11) for more information. 16 VDD Logic Supply Terminal. 17 VEE Negative Supply Terminal. 18 NC No Connect. Do not connect to this pin. 19 VEE Negative Supply Terminal. 20 VCC Positive Supply Terminal. 21 VCC Positive Supply Terminal. 22 VEE Negative Supply Terminal. 23 NC No Connect. Do not connect to this pin. Rev. A | Page 6 of 14 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TIMING INFORMATION APPLICATIONS INFORMATION CLOCK TIMING RECOVERY OPTIMIZING HIGH SPEED PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE