Datasheet HMC874LC3C (Analog Devices) - 6

FabricanteAnalog Devices
Descripción20 Gbps Clocked Comparator
Páginas / Página12 / 6 — HMC874LC3C. 20 Gbps CLOCKED COMPARATOR. Timing Diagram. Power Sequencing
Formato / tamaño de archivoPDF / 677 Kb
Idioma del documentoInglés

HMC874LC3C. 20 Gbps CLOCKED COMPARATOR. Timing Diagram. Power Sequencing

HMC874LC3C 20 Gbps CLOCKED COMPARATOR Timing Diagram Power Sequencing

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HMC874LC3C
v07.0616
20 Gbps CLOCKED COMPARATOR Timing Diagram
T M S - S R O AT R A P OM C
Power Sequencing
As long as the input signal is not near the -2 V extreme, either Vcc or Vee can be powered on first. However, if the input voltage is more negative than -1.8 V, we recommend the fol owing power-up sequence. 1) Vee 2) Vcci and Vcco (if Vcco = Vcci) 3) Vcco (if different than ground). Power down would be the reverse of this sequence. It is also recommended that the device be powered before applying the input signal and also that the input signal be removed prior to power down. This is most important if any of the inputs are more negative than -1.8 V. For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
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Document Outline Typical Applications Features Functional Diagram General Description Electrical Specifications Performance Characteristics Outline Drawing Package Information Evaluation PCB CLK, CLK Interfacing Resistor Network Bias Tee