Datasheet ADCMP600, ADCMP601, ADCMP602 (Analog Devices)

Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators ADCMP600/ADCMP601/ADCMP602 FEATURES FUNCTIONAL BLOCK DIAGRAM Fully specified rail to rail at V = 2.5 V to 5.5 V CC Input common-mode voltage from −0.2 V to V + 0.2 V CC NONINVERTING Low glitch CMOS-/TTL-compatible output stage INPUT ADCMP600/ 3.5 ns propagation delay ADCMP601/ Q OUTPUT 10 mW at 3.3 V ADCMP602 INVERTING Shutdown pin INPUT Single-pin control for programmable hysteresis and latch Power supply rejection > 50 dB LE/HYS S
001
DN Improved replacement for MAX999 (EXCEPT ADCMP600) (ADCMP602 ONLY)
05914-
−40°C to +125°C operation
Figure 1.
APPLICATIONS High speed instrumentation Clock and data signal restoration Logic level shifting or translation Pulse spectroscopy High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current/voltage-controlled oscillators Automatic test equipment (ATE) GENERAL DESCRIPTION
The ADCMP600, ADCMP601, and ADCMP602 are very fast input signal range while still allowing independent output comparators fabricated on XFCB2, an Analog Devices, Inc. swing control and power savings. proprietary process. These comparators are exceptionally The TTL-/CMOS-compatible output stage is designed to drive versatile and easy to use. Features include an input range from up to 5 pF with full timing specs and to degrade in a graceful GND − 0.5 V to VCC + 0.2 V, low noise, TTL-/CMOS-compatible and linear fashion as additional capacitance is added. The output drivers, and latch inputs with adjustable hysteresis comparator input stage offers robust protection against large and/or shutdown inputs. input overdrive, and the outputs do not phase reverse when the The device offers 5 ns propagation delay with 10 mV overdrive valid input signal range is exceeded. Latch and programmable on 3 mA typical supply current. hysteresis features are also provided with a unique single-pin A flexible power supply scheme allows the devices to operate control option. with a single +2.5 V positive supply and a −0.5 V to +2.8 V The ADCMP600 is available in 5-lead SC70 and SOT-23 input signal range up to a +5.5 V positive supply with a −0.5 V packages, the ADCMP601 is available in a 6-lead SC70 package, to +5.8 V input signal range. Split input/output supplies with no and the ADCMP602 is available in an 8-lead MSOP package. sequencing restrictions on the ADCMP602 support a wide
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Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Characteristics Timing Information Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Application Information Power/Ground Layout and Bypassing TTL-/CMOS-Compatible Output Stage Using/Disabling the Latch Feature Optimizing Performance Comparator Propagation Delay Dispersion Comparator Hysteresis Crossover Bias Point Minimum Input Slew Rate Requirement Typical Application Circuits Outline Dimensions Ordering Guide