Datasheet AD9363 (Analog Devices) - 5

link to page 16 link to page 7
Data Sheet AD9363 Parameter1 Symbol Min Typ Max Unit Test Conditions/Comments
Third-Order Output Intermodulation OIP3 18 dBm Intercept Point Carrier Leakage −50 dBc 0 dB attenuation −31 dBc 40 dB attenuation Noise Floor −154 dBm/Hz 90 MHz offset Isolation TX1 to TX2 50 dB TX2 to TX1 50 dB 1 When referencing a single function of a multifunction pin in the parameters, only the portion of the pin name that is relevant to the specification is listed. For full pin names of multifunction pins, refer to the Pin Configuration and Function Descriptions section.
Table 2. Parameter1 Symbol Min Typ Max Unit Test Conditions/Comments
TX MONITOR INPUTS (TX_MON1, TX_MON2) Maximum Input Level 4 dBm Dynamic Range 66 dB Accuracy 1 dB LO SYNTHESIZER LO Frequency Step 2.4 Hz 2.4 GHz, 40 MHz reference clock Integrated Phase Noise 0.3 °rms 100 Hz to 100 MHz REFERENCE CLOCK (REF_CLK) REF_CLK is the input to the XTALN pin Input Frequency Range 10 80 MHz External oscillator Input Signal Level 1.3 V p-p AC-coupled external oscillator AUXILIARY ADC Resolution 12 Bits Input Voltage Minimum 0.05 V Maximum VDDA1P3_BB − V 0.05 AUXILIARY DAC Resolution 10 Bits Output Voltage Minimum 0.5 V Maximum VDD_GPO − 0.3 V Output Current 10 mA DIGITAL SPECIFICATIONS (CMOS) Logic Inputs Input Voltage High VDD_INTERFACE × VDD_INTERFACE V 0.8 Input Voltage Low 0 VDD_INTERFACE × V 0.2 Input Current High −10 +10 μA Input Current Low −10 +10 μA Logic Outputs Output Voltage High VDD_INTERFACE × VDD_INTERFACE V 0.8 Output Voltage Low 0 VDD_INTERFACE × V 0.2 DIGITAL SPECIFICATIONS (LVDS) Logic Inputs Input Voltage Range 825 1575 mV Each differential input in the pair Input Differential Voltage −100 +100 mV Threshold Rev. D | Page 5 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS CURRENT CONSUMPTION—VDD_INTERFACE CURRENT CONSUMPTION—VDDx (COMBINATION OF ALL 1.3 V SUPPLIES) ABSOLUTE MAXIMUM RATINGS REFLOW PROFILE THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS 800 MHZ FREQUENCY BAND 2.4 GHZ FREQUENCY BAND THEORY OF OPERATION GENERAL RECEIVER TRANSMITTER CLOCK INPUT OPTIONS SYNTHESIZERS RF PLLs BB PLL DIGITAL DATA INTERFACE DATA_CLK Signal FB_CLK Signal RX_FRAME and TX_FRAME Signals ENABLE STATE MACHINE SPI Control Mode Pin Control Mode SPI INTERFACE CONTROL PINS Control Outputs (CTRL_OUT7 to CTRL_OUT0) Control Inputs (CTRL_IN3 to CTRL_IN0) GPO PINS (GPO_3 TO GPO_0) AUXILIARY CONVERTERS AUXADC AUXDAC1 and AUXDAC2 POWERING THE AD9363 APPLICATIONS INFORMATION PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE