link to page 12 Preliminary Technical DataADRV9002ParameterSymbol MinTyp Max UnitsTestConditions/Comments RECEIVER BANDWIDTH 12 40000 kHz Zero-IF mode, the analog low-pass filter (LPF) bandwidth is 5 MHz minimum, and the programmable finite impulse response (FIR) filter bandwidth is configurable over the entire range. RECEIVER ALIAS BAND 80 dB This performance is achieved because of the digital filters. REJECTION CONTINUOUS WAVE FULL- FSIP −11.4 dBm This continuous wave signal level corresponds to the input SCALE INPUT POWER1 power at maximum gain that produces 0 dBFS at the ADC output, this level increases dB for dB with attenuation. Back off by at least −2 dBFS is required. INPUT IMPEDANCE 100 Ω Differential, see the ADRV9001 System Development User Guide for more information. INPUT PORT RETURN LOSS Unmatched differential port return loss, simulated. 30 MHz TBD dB 470 MHz 30 dB 900 MHz 25 dB 2400 MHz 18 dB 3500 MHz 15 dB 5800 MHz 14 dB NOISE FIGURE NF 30 MHz 14 dB 470 MHz 11 dB High performance receiver ADCs, 0 dB attenuation at 900 MHz 11 dB device under test (DUT) receive port, integrated 2400 MHz 12 dB bandwidth from 8 MHz to 9 MHz. 3500 MHz 13 dB 5800 MHz 15 dB Noise Figure Ripple 1 dB High performance receiver ADCs at the band edge. 30 MHz 14 dB 470 MHz 12 dB 900 MHz 15 dB Low power receiver ADCs, 0 dB attenuation at the DUT 2400 MHz 12 dB receive port, integrated bandwidth from 8 MHz to 9 MHz. 3500 MHz 12 dB 5800 MHz 13 dB Noise Figure Ripple 1 dB Low power receiver ADCs at the band edge. SECOND-ORDER INPUT INTERMODULATION INTERCEPT POINT Wideband IIP2WB High performance receiver ADCs, 0 dB receiver attenuation, 1 dB cutoff frequency (f1dB) of Transimpedance Amplifier (TIA) = 20 MHz, two continuous wave tones at 17 MHz and 18 MHz, FSIP − 12 dB/tone. 30 MHz 70 dBm 470 MHz 73 dBm 900 MHz 75 dBm 2400 MHz 66 dBm 3500 MHz 68 dBm 5800 MHz 66 dBm Narrow-Band IIP2LB High performance receiver ADCs, 0 dB receiver attenuation, f1dB of TIA = 2 MHz, two continuous wave tones at 100 kHz and 150 kHz, FSIP − 12 dB/tone. 30 MHz 75 dBm 470 MHz 86 dBm 900 MHz 74 dBm 2400 MHz 68 dBm Rev. PrA | Page 7 of 71 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS TRANSMITTER SPECIFICATIONS RECEIVER SPECIFICATIONS INTERNAL LO, EXTERNAL LO, AND DEVICE CLOCK DIGITAL INTERFACES AND AUXILIARY CONVERTERS POWER SUPPLY SPECIFICATIONS CURRENT CONSUMPTION ESTIMATES (TYPICAL VALUES) Sleep Mode (Typical Values) TDD Operation (Typical Values) FDD Operation (Typical Values) TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS REFLOW PROFILE THERMAL RESISTANCE ELECTROSTATIC DISCHARGE (ESD) RATINGS ESD Ratings for ADRV2009 ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS 30 MHZ BAND 470 MHZ BAND 900 MHZ BAND 2400 MHZ BAND 3500 MHZ BAND 5800 MHZ BAND PHASE NOISE THEORY OF OPERATION TRANSMITTER RECEIVER Monitor Mode DPD Receiver as an Observation Receiver CLOCK INPUT SYNTHESIZERS RF PLL Baseband PLL (PLL) SPI INTERFACE GPIO PINS Digital GPIO Inputs/Outputs (DGPIO) Analog GPIO Inputs/Outputs (AGPIO) AUXILLARY CONVERTERS Auxiliary ADC Inputs (AUXADC_x) Auxiliary DACs Outputs (AUXDAC_x) JTAG BOUNDARY SCAN APPLICATIONS INFORMATION POWER SUPPLY SEQUENCE DIGITAL DATA INTERFACE CSSI CSSI Receive CSSI Transmit LSSI OUTLINE DIMENSIONS