Datasheet ADRV9026 (Analog Devices) - 7

Data Sheet ADRV9026 Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Noise Figure Ripple 1.5 dB At band edge Second-Order Input IIP2 0 dB attenuation, complex Intermodulation Intercept Point 800 MHz 65 dBm 1800 MHz 65 dBm 2600 MHz 65 dBm 3800 MHz 62 dBm 4800 MHz 62 dBm 5700 MHz 58 dBm Wideband Third-Order Input IIP3WB_DIFF Two tones near the band edge, test condition: Intermodulation Intercept Point, PHIGH − 9 dB/tone Difference Product 800 MHz 15 dBm 1800 MHz 17 dBm 2600 MHz 17 dBm 3800 MHz 17 dBm 4800 MHz 17 dBm 5700 MHz 18 dBm Midband Third-Order Input IIP3MB_DIFF Two tones near the middle of the band; test Intermodulation Intercept Point, condition: PHIGH − 9 dB/tone Difference Product 800 MHz 18 dBm 1800 MHz 22 dBm 2600 MHz 21 dBm 3800 MHz 22 dBm 4800 MHz 22 dBm 5700 MHz 20 dBm Wideband Third-Order Input IIP3WB_SUM Two tones approximately bandwidth ÷ 6 offset Intermodulation Intercept Point, from the LO; test condition: PHIGH – 9 dB/tone Sum Product 800 MHz 17 dBm 1800 MHz 17 dBm 2600 MHz 20 dBm 3800 MHz 23 dBm 4800 MHz 23 dBm 5700 MHz 20 dBm Second-Order Harmonic Distortion Maximum Input HD2MAX −72 dBc PHIGH continuous wave signal, harmonic distortion tones falling within 100 MHz of the LO Recommended Input HD2 −75 dBc PHIGH − 3 dB continuous wave signal, harmonic distortion tones falling within 100 MHz of the LO Third-Order Harmonic Distortion Maximum Input HD3MAX −66 dBc PHIGH continuous wave signal, harmonic distortion tones falling within 100 MHz of the LO Recommended Input HD3 −72 dBc PHIGH − 3 dB continuous wave signal, harmonic distortion tones falling within 100 MHz of the LO Fourth-Order Harmonic Distortion Maximum Input HD4MAX −90 dBc PHIGH continuous wave signal, harmonic distortion tones falling within 100 MHz of the LO Recommended Input HD4 −90 dBc PHIGH − 3 dB continous wave signal, harmonic distortion tones falling within 100 MHz of the LO Rev. A | Page 7 of 118 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Transmitters and Receivers Synthesizers, Auxiliary Converters, and Clock References Digital Specifications Power Supply Specifications Current Consumption TDD Operation—Four Receiver Channels Enabled TDD Operation—Four Transmitter and One Observation Receiver Channels Enabled FDD Operation—LO1 and LO2, Four Receiver, Four Transmitter, and One Observation Receiver Channels Enabled Digital Interface and Timing Specifications Absolute Maximum Ratings Junction Temperature Reflow Profile Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics 800 MHz Band 1800 MHz Band 2600 MHz Band 3800 MHz Band 4800 MHz Band 5700 MHz Band Theory of Operation General Transmitter Receiver Observation Receiver Clock Input Synthesizers RF Synthesizers Auxiliary Synthesizer Clock Synthesizer SPI Interface GPIO_x Pins Auxiliary Converters GPIO_ANA_x/AUXDAC_x AUXADC_x JTAG Boundary Scan Applications Information Power Supply Sequence Data Interface Outline Dimensions Ordering Guide