Datasheet ADL5902 (Analog Devices) - 4

ADL5902 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit
Deviation from CW Response 11.02 dB peak-to-rms ratio (CDMA2000) −0.1 dB 5.13 dB peak-to-rms ratio (16 QAM) −0.05 dB 2.76 dB peak-to-rms ratio (QPSK) −0.05 dB 1.9 GHz ±1.0 dB Dynamic Range CW input, TA = +25°C, VTADJ = 0.4 V 64 dB Maximum Input Level, ±1.0 dB Calibration at −60 dBm, −45 dBm, and 0 dBm 3 dBm Minimum Input Level, ±1.0 dB Calibration at −60 dBm, −45 dBm, and 0 dBm −61 dBm Deviation vs. Temperature Deviation from output at 25°C −40°C < TA < +85°C; PIN = 0 dBm −0.1/0 dB −40°C < TA < +85°C; PIN = −45 dBm −0.3/+0.3 dB −40°C < TA < +125°C; PIN = 0 dBm −0.1/0 dB −40°C < TA < +125°C; PIN = −45 dBm −0.3/+0.4 dB Logarithmic Slope −45 dBm < PIN < 0 dBm; calibration at −45 dBm, 52.6 mV/dB and 0 dBm Logarithmic Intercept −45 dBm < PIN < 0 dBm; calibration at −45 dBm −62.6 dBm and 0 dBm 2.14 GHz ±1.0 dB Dynamic Range CW input, TA = +25°C, VTADJ = 0.4 V 65 dB Maximum Input Level, ±1.0 dB Calibration at −60 dBm, −45 dBm, and 0 dBm 3 dBm Minimum Input Level, ±1.0 dB Calibration at −60 dBm, −45 dBm, and 0 dBm −62 dBm Deviation vs. Temperature Deviation from output at 25°C −40°C < TA < +85°C; PIN = 0 dBm −0.1/0 dB −40°C < TA < +85°C; PIN = −45 dBm −0.3/+0.3 dB −40°C < TA < +125°C; PIN = 0 dBm −0.1/0 dB −40°C < TA < +125°C; PIN = −45 dBm −0.3/+0.4 dB Logarithmic Slope −45 dBm < PIN < 0 dBm; calibration at −45 dBm 52.4 mV/dB and 0 dBm Logarithmic Intercept −45 dBm < PIN < 0 dBm; calibration at −45 dBm −62.9 dBm and 0 dBm Deviation from CW Response 12.16 dB peak-to-rms ratio (four-carrier W-CDMA) −0.1 dB 11.58 dB peak-to-rms ratio (LTE TM1 1CR 20 MHz BW) −0.1 dB 10.56 dB peak-to-rms ratio (one-carrier W-CDMA) −0.1 dB 6.2 dB peak-to-rms ratio (64 QAM) −0.07 dB 2.6 GHz ±1.0 dB Dynamic Range CW input, TA = +25°C, VTADJ = 0.45 V 65 dB Maximum Input Level, ±1.0 dB Calibration at −60, −45 and 0 dBm 5 dBm Minimum Input Level, ±1.0 dB Calibration at −60, −45 and 0 dBm −60 dBm Deviation vs. Temperature Deviation from output at 25°C −40°C < TA < +85°C; PIN = 0 dBm 0.4/0 dB −40°C < TA < +85°C; PIN = −45 dBm +0.5/−0.6 dB −40°C < TA < +125°C; PIN = 0 dBm 0.6/0 dB −40°C < TA < +125°C; PIN = −45 dBm +0.7/−0.6 dB Logarithmic Slope −45 dBm < PIN < 0 dBm; calibration at −45 dBm 51.0 mV/dB and 0 dBm Logarithmic Intercept −45 dBm < PIN < 0 dBm; calibration at −45 dBm −62.1 dBm and 0 dBm 3.5 GHz ±1.0 dB Dynamic Range CW input, TA = +25°C, VTADJ = 0.5 V 57 dB Maximum Input Level, ±1.0 dB Calibration at −60 dBm, −40 dBm, and 0 dBm 8 dBm Minimum Input Level, ±1.0 dB Calibration at −60 dBm, −40 dBm, and 0 dBm −49 dBm Rev. B | Page 4 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SQUARE LAW DETECTOR AND AMPLITUDE TARGET RF INPUT INTERFACE SMALL SIGNAL LOOP RESPONSE TEMPERATURE SENSOR INTERFACE VREF INTERFACE TEMPERATURE COMPENSATION INTERFACE POWER-DOWN INTERFACE VSET INTERFACE OUTPUT INTERFACE VTGT INTERFACE BASIS FOR ERROR CALCULATIONS MEASUREMENT MODE BASIC CONNECTIONS SETTING VTADJ SETTING VTGT CHOOSING A VALUE FOR CLPF OUTPUT VOLTAGE SCALING SYSTEM CALIBRATION AND ERROR CALCULATION HIGH FREQUENCY PERFORMANCE LOW FREQUENCY PERFORMANCE DESCRIPTION OF CHARACTERIZATION EVALUATION BOARD SCHEMATICS AND ARTWORK ASSEMBLY DRAWINGS OUTLINE DIMENSIONS ORDERING GUIDE