Datasheet SSM2164 (Analog Devices) - 7

FabricanteAnalog Devices
DescripciónLow Cost QuadVoltage Controlled Amplifier
Páginas / Página12 / 7 — SSM2164. APPLICATIONS INFORMATION Circuit Description. VS =. 15V. –20. TA …
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SSM2164. APPLICATIONS INFORMATION Circuit Description. VS =. 15V. –20. TA = +25. –40. +PSRR. PSRR – dB –60. –PSRR. –80. –100. 100. 10k. 100K

SSM2164 APPLICATIONS INFORMATION Circuit Description VS = 15V –20 TA = +25 –40 +PSRR PSRR – dB –60 –PSRR –80 –100 100 10k 100K

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SSM2164 0 APPLICATIONS INFORMATION Circuit Description
The SSM2164 is a quad Voltage Controlled Amplifier (VCA)
VS =
±
15V –20 TA = +25
°
C
with 120 dB of gain control range. Each VCA is a current-in, current-out device with a separate –33 mV/dB voltage input control port. The class of operation (either Class A or Class
–40
AB) is set by a single external resistor allowing optimization of
+PSRR
the distortion versus noise tradeoff for a particular application.
PSRR – dB –60
The four independent VCAs in a single 16-pin package make
–PSRR
the SSM2164 ideal for applications where multiple volume control elements are needed.
–80 V+ –100 10 100 1k 10k 100K 1M FREQUENCY – Hz
Figure 20. PSRR vs. Frequency
I Q5 Q6 Q7 Q8 IN 25 VS =
±
15V T IOUT 20 A = +25
°
C 4.5k

MODE Q1 Q2 Q3 Q4 VC +ISY 15 500

450

–ISY 10 SUPPLY CURRENT – mA 5 0 V– 1k 10k 100k 1M RBIAS –
Ω Figure 23. Simplified Schematic (One Channel) Figure 21. Supply Current vs. RBIAS The simplified schematic in Figure 23 shows the basic structure of one of the four VCAs in the device. The gain core is com- prised of the matched differential pairs Q1-Q4 and the current
–45
mirrors of Q5, Q6 and Q7, Q8. The current input pin, I , is IN
CLASS A AND
connected to the collectors of Q1 and Q7, and the difference in
CLASS AB –40
current between these two transistors is equivalent to I . For IN
V
example, if 100 µA is flowing into the input, Q1’s collector
S =
±
15V
current will be 100 µA higher than Q7’s collector current.
–35 OBSOLETE
Varying the control voltage V , steers the signal current from C one side of each differential pair to the other, resulting in either
–30
gain or attenuation. For example, a positive voltage on VC steers more current through Q1 and Q4 and decreases the
GAIN CONSTANT – mV/dB
current in Q2 and Q3. The current output pin, I , is con- OUT
–25
nected to the collector of Q3 and the current mirror (Q6) from Q2. With less current flowing through these two transistors, less
–20
current is available at the output. Thus, a positive V attenuates C
–50 –25 0 25 50 75 100
the input and a negative V amplifies the input. The VCA has C
TEMPERATURE –
°
C
unity gain for a control voltage of 0.0 V where the signal current is divided equally between the gain core differential pairs. Figure 22. Gain Constant vs. Temperature The MODE pin allows the setting of the quiescent current in the gain core of the VCA to trade off the SSM2164’s THD and noise performance to an optimal level for a particular applica- tion. Higher current through the core results in lower distortion REV. 0 –7–