Datasheet ADuM5401W, ADuM5402W, ADuM5403W (Analog Devices) - 6

ADuM5401W/ADuM5402W/ADuM5403W Data Sheet ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
Typical specifications are at TA = 25°C, VDD1 = VISO = 3.3 V, VSEL = GNDISO. Minimum/maximum specifications apply over the entire recommended operation range, which is 3.0 V ≤ VDD1, VISO ≤ 3.6 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 6. DC-to-DC Converter Static Specifications Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC-TO-DC CONVERTER SUPPLY Setpoint VISO 3.0 3.3 3.6 V IISO = 0 mA Line Regulation VISO (LINE) 1 mV/V IISO = 30 mA, VDD1 = 3.0 V to 3.6 V Load Regulation VISO (LOAD) 1 5 % IISO = 6 mA to 54 mA Output Ripple VISO (RIP) 50 mV p-p 20 MHz bandwidth, CBO = 0.1 µF||10 µF, IISO = 54 mA Output Noise VISO (NOISE) 130 mV p-p CBO = 0.1 µF||10 µF, IISO = 54 mA Switching Frequency fOSC 180 MHz PWM Frequency fPWM 625 kHz Output Supply Current IISO (MAX) 60 mA VISO > 3 V Efficiency at IISO (MAX) 33 % IISO = 60 mA IDD1, No VISO Load IDD1 (Q) 14 22 mA IDD1, Full VISO Load IDD1 (MAX) 175 mA
Table 7. DC-to-DC Converter Dynamic Specifications 25 Mbps—C Grade Parameter Symbol Min Typ Max Unit Test Conditions/Comments
SUPPLY CURRENT Input IDD1 ADuM5401W 44 mA No VISO load ADuM5402W 46 mA No VISO load ADuM5403W 47 mA No VISO load Available to Load IISO (LOAD) ADuM5401W 52 mA ADuM5402W 51 mA ADuM5403W 49 mA
Table 8. Switching Specifications Parameter Symbol Min Typ Max Unit Test Conditions/Comments
SWITCHING SPECIFICATIONS Data Rate 25 Mbps Within PWD limit Propagation Delay tPHL, tPLH 45 60 ns 50% input to 50% output Pulse Width Distortion PWD 6 ns |tPLH − tPHL| Change vs. Temperature 5 ps/°C Pulse Width PW 40 ns Within PWD limit Propagation Delay Skew tPSK 45 ns Between any two units Channel Matching Codirectional1 tPSKCD 6 ns Opposing Directional2 tPSKOD 15 ns 1 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. 2 Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. Rev. F | Page 6 of 25 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY PACKAGE CHARACTERISTICS REGULATORY APPROVALS INSULATION AND SAFETY-RELATED SPECIFICATIONS DIN EN 69747-5-2 (VDE 0884 TEIL 2) INSULATION CHARACTERISTICS RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TRUTH TABLE TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY APPLICATIONS INFORMATION THEORY OF OPERATION PCB LAYOUT THERMAL ANALYSIS PROPAGATION DELAY RELATED PARAMETERS START-UP BEHAVIOR EMI CONSIDERATIONS DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY POWER CONSUMPTION POWER CONSIDERATIONS INSULATION LIFETIME VISO START-UP ISSUES Symptom Cause Solution OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS