Datasheet AD5590 (Analog Devices) - 42
| Fabricante | Analog Devices |
| Descripción | 16 Input, 16 Output Analog I/O Port with Integrated Amplifiers |
| Páginas / Página | 44 / 42 — AD5590. OUTLINE DIMENSIONS. A1 CORNER. INDEX AREA. 10.00. BSC SQ. 12 11 … |
| Revisión | A |
| Formato / tamaño de archivo | PDF / 1.0 Mb |
| Idioma del documento | Inglés |
AD5590. OUTLINE DIMENSIONS. A1 CORNER. INDEX AREA. 10.00. BSC SQ. 12 11 10 9 8 7 6 5 4 3 2 1. 2.50 SQ. BALL A1. PAD CORNER. 8.80. BOTTOM
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AD5590 OUTLINE DIMENSIONS A1 CORNER INDEX AREA 10.00 BSC SQ 12 11 10 9 8 7 6 5 4 3 2 1 A B 2.50 SQ C BALL A1 D PAD CORNER 8.80 E BSC SQ BOTTOM F TOP VIEW VIEW G H J K L M 0.60 REF 0.80 BSC DETAIL A 1.50 1.36 1.11 1.21 DETAIL A 0.65 REF 1.01 0.91 0.36 REF 0.35 NOM 0.12 MAX 0.30 MIN *0.50 COPLANARITY SEATING 0.45 PLANE 0.40 BALL DIAMETER A *COMPLIANT TO JEDEC STANDARDS MO-205-AC 1007- WITH THE EXCEPTION TO BALL DIAMETER. 01
Figure 74. 80-Ball Chip Scale Package Ball Grid Array [CSP_BGA] (BC-80-2) Dimensions shown in millimeters
ORDERING GUIDE Model1 Temperature Range Package Description Package Option
AD5590BBC −40°C to +85°C 80-Ball CSP_BGA BC-80-2 AD5590BBCZ −40°C to +85°C 80-Ball CSP_BGA BC-80-2 EVAL-AD5590EBZ Evaluation Board 1 Z = RoHS Compliant Part. Rev. A | Page 42 of 44 Document Outline Features Applications Functional Block Diagram Revision History General Description Specifications ADC Specifications DAC Specifications DAC AC Characteristics Operational Amplifier Specifications Timing Specifications ADC Timing Characteristics DAC Timing Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics DAC ADC Amplifier Terminology Theory of Operation DAC Section Resistor String DAC Internal Reference DAC Output Amplifier ADC Section ADC Converter Operation Analog Input ADC Transfer Function Analog Input Selection Digital Inputs VDRIVE Reference Section Amplifier Section Serial Interface Accessing the DAC Block DAC Input Shift Register Interrupt DAC Internal Reference Register DAC Power-On Reset DAC Power-Down Modes DAC Clear Code Register LDAC Function Accessing the ADC Block ADC Modes of Operation Normal Mode (PM1 = PM0 = 1) Full Shutdown (PM1 = 1, PM0 = 0) AutoShutdown (PM1 = 0, PM0 = 1) Autostandby (PM1 = PM0 = 0) Powering Up the ADC Interfacing to the ADC ADC Control Register ADC Sequencer Operation ADC Shadow Register ADC Power vs. Throughput Rate Outline Dimensions Ordering Guide
AD5590 OUTLINE DIMENSIONS A1 CORNER INDEX AREA 10.00 BSC SQ 12 11 10 9 8 7 6 5 4 3 2 1 A B 2.50 SQ C BALL A1 D PAD CORNER 8.80 E BSC SQ BOTTOM F TOP VIEW VIEW G H J K L M 0.60 REF 0.80 BSC DETAIL A 1.50 1.36 1.11 1.21 DETAIL A 0.65 REF 1.01 0.91 0.36 REF 0.35 NOM 0.12 MAX 0.30 MIN *0.50 COPLANARITY SEATING 0.45 PLANE 0.40 BALL DIAMETER A *COMPLIANT TO JEDEC STANDARDS MO-205-AC 1007- WITH THE EXCEPTION TO BALL DIAMETER. 01
Figure 74. 80-Ball Chip Scale Package Ball Grid Array [CSP_BGA] (BC-80-2) Dimensions shown in millimeters
ORDERING GUIDE Model1 Temperature Range Package Description Package Option
AD5590BBC −40°C to +85°C 80-Ball CSP_BGA BC-80-2 AD5590BBCZ −40°C to +85°C 80-Ball CSP_BGA BC-80-2 EVAL-AD5590EBZ Evaluation Board 1 Z = RoHS Compliant Part. Rev. A | Page 42 of 44 Document Outline Features Applications Functional Block Diagram Revision History General Description Specifications ADC Specifications DAC Specifications DAC AC Characteristics Operational Amplifier Specifications Timing Specifications ADC Timing Characteristics DAC Timing Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics DAC ADC Amplifier Terminology Theory of Operation DAC Section Resistor String DAC Internal Reference DAC Output Amplifier ADC Section ADC Converter Operation Analog Input ADC Transfer Function Analog Input Selection Digital Inputs VDRIVE Reference Section Amplifier Section Serial Interface Accessing the DAC Block DAC Input Shift Register Interrupt DAC Internal Reference Register DAC Power-On Reset DAC Power-Down Modes DAC Clear Code Register LDAC Function Accessing the ADC Block ADC Modes of Operation Normal Mode (PM1 = PM0 = 1) Full Shutdown (PM1 = 1, PM0 = 0) AutoShutdown (PM1 = 0, PM0 = 1) Autostandby (PM1 = PM0 = 0) Powering Up the ADC Interfacing to the ADC ADC Control Register ADC Sequencer Operation ADC Shadow Register ADC Power vs. Throughput Rate Outline Dimensions Ordering Guide