Datasheet AD74412R (Analog Devices) - 9

FabricanteAnalog Devices
DescripciónQuad-Channel, Software Configurable Input/Output
Páginas / Página66 / 9 — Data Sheet. AD74412R. CURRENT INPUT LOOP POWERED. Table 5. Parameter. …
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Data Sheet. AD74412R. CURRENT INPUT LOOP POWERED. Table 5. Parameter. Min. Typ. Max. Unit. Test Conditions/Comments. RTD MEASUREMENT

Data Sheet AD74412R CURRENT INPUT LOOP POWERED Table 5 Parameter Min Typ Max Unit Test Conditions/Comments RTD MEASUREMENT

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Data Sheet AD74412R CURRENT INPUT LOOP POWERED
AVDD = 14 V to 26.4 V, AGND = DGND = 0 V, REFIN = 2.5 V (REFOUT tied to REFIN), DVCC = 2.7 V to 5.5 V, IOVDD = 1.7 V to 5.5 V, and all specifications at TA=−40°C to +85°C, unless otherwise noted. CLOAD = 68 nF per recommended configuration, AGND − 0.5 V < I/OP_x screw terminals voltage < AVDD − 0.2 V, and RSENSE = 100 Ω, 0.1%, 10 ppm/°C.
Table 5. Parameter Min Typ Max Unit Test Conditions/Comments
CURRENT INPUTS Input Resolution 16 Bits Input Range 0 25 mA Sensed across external 100 Ω resistor Programmable Current Limit 0.5 24.5 mA Typical programmable current limit, current input loop powered enabled, 13-bit resolution ACCURACY TUE1 −0.5 +0.5 %FSR Internal reference, 0.16% contribution from RSENSE −0.36 +0.36 %FSR External reference, 0.16% contribution from RSENSE TUE at 25°C −0.34 +0.34 %FSR Internal reference −0.2 +0.2 %FSR External reference TUE Drift vs. Time1, 2 700 ppm FSR Internal reference, drift after 1000 hours, TA = 85°C 600 ppm FSR External reference, drift after 1000 hours, TA = 85°C INL −5 +2 +5 LSB Linearity specified in 0.1 mA – 25 mA range Gain Error 2000 ppm FSR Offset Error ±2 LSB OTHER INPUT SPECIFICATIONS DC PSRR2 150 nA/V Input Impedance 175 Ω Including 100 Ω RSENSE Headroom 5.0 V Minimum required difference between AVDD and the I/OP_x screw terminal voltage to source 25 mA 1 RSENSE accuracy directly impacts the TUE and gain error. 2 Guaranteed by design and characterization.
RTD MEASUREMENT
AVDD = 14 V to 26.4 V, AGND = DGND = 0 V, REFIN = 2.5 V (REFOUT pin tied to REFIN pin), DVCC = 2.7 V to 5.5 V, IOVDD = 1.7 V to 5.5 V, and all specifications at TA= −40°C to +85°C, unless otherwise noted. External current limiting resistor of 2 kΩ, 0.1% accuracy, and 10 ppm/°C connected to the SENSEH_x pin. RSENSE = 100 Ω, 0.1%, 10 ppm/°C.
Table 6. Parameter Min Typ Max Unit Test Conditions/Comments
RESISTANCE MEASUREMENT Input Range 0 1 MΩ 2-wire RTD measurements supported Bias Voltage 2.5 V Pull-Up Resistor (RPULL-UP) 2.1 kΩ RPULL-UP is comprised of the external 2 kΩ resistor and the external 100 Ω RSENSE with an accuracy of 0.1%, 10 ppm/°C ACCURACY Measurement Range 0 Ω to 80 Ω 0.5% ± 0.5 Ω ±% of measured value ± Ω offset 80 Ω to 200 Ω 0.3 % ±% of measured value 200 Ω to 1 kΩ 0.2 % ±% of measured value 1 kΩ to 10 kΩ 0.2 % ±% of measured value 10 kΩ to 20 kΩ 0.3 % ±% of measured value 20 kΩ to 100 kΩ 0.8 % ±% of measured value 100 kΩ to 200 kΩ 1.0 % ±% of measured value 200 kΩ to 1 MΩ 8 % ±% of measured value Rev. A | Page 9 of 66 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION COMPANION PRODUCTS PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS VOLTAGE OUTPUT CURRENT OUTPUT VOLTAGE INPUT CURRENT INPUT EXTERNALLY POWERED CURRENT INPUT LOOP POWERED RTD MEASUREMENT DIGITAL INPUT LOGIC DIGITAL INPUT LOOP POWERED ADC SPECIFICATIONS GENERAL SPECIFICATIONS TIMING CHARACTERISTICS SPI Timing Specifications Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS VOLTAGE OUTPUT CURRENT OUTPUT REFERENCE ADC SUPPLIES THEORY OF OPERATION ROBUST ARCHITECTURE SERIAL INTERFACE DAC ARCHITECTURE ADC OVERVIEW REFERENCE Reference Noise Charge Pump POWER-ON STATE OF THE AD74412R DEVICE FUNCTIONS High Impedance Interpreting ADC Data Voltage Output Mode Voltage Output Short-Circuit Protection Interpretin ADC Data Current Output Mode Current Output Open Circuit Detection Interpreting ADC Data Voltage Input Mode Selectable 200 kΩ to GND Interpreting ADC Data Current Input, Externally Powered Mode Short-Circuit Protection Interpreting ADC Data Current Input, Loop Powered Mode Short-Circuit Protection Interpreting ADC Data Resistance Measurement (External 2-Wire RTD) Interpreting ADC Data Digital Input Logic Interpreting ADC Data Digital Input Current Sink Digital Input Threshold Setting Debounce Function Debounce Mode 0 (Default) Debounce Mode 1 Digital Input Inverter DIGITAL INPUT, LOOP POWERED MODE Interpreting ADC Data GETTING STARTED USING CHANNEL FUNCTIONS Switching Channel Functions ADC FUNCTIONALITY ADC Conversion Rates ADC_RDYB Functionality ADC Output Data Format ADC Noise DIAGNOSTICS DACs LDAC Function Clear Code Function Digital Linear Slew Rate Control DRIVING INDUCTIVE LOADS RESET FUNCTION THERMAL ALERT AND THERMAL RESET FAULTS AND ALERTS Channel Faults POWER SUPPLY MONITORS GPO_x PINS SPI INTERFACE AND DIAGNOSTICS SPI CRC SPI Interface SCLK Count Feature Readback Mode Streaming Mode Auto Readback BOARD DESIGN AND LAYOUT CONSIDERATIONS APPLICATIONS INFORMATION REGISTER MAP NOP REGISTER FUNCTION SETUP REGISTER PER CHANNEL ADC CONFIGURATION REGISTER PER CHANNEL DIGITAL INPUT CONFIGURATION REGISTER PER CHANNEL GPO PARALLEL DATA REGISTER GPO CONFIGURATION REGISTER PER CHANNEL OUTPUT CONFIGURATION REGISTER PER CHANNEL DAC CODE REGISTER PER CHANNEL DAC CLEAR CODE REGISTER PER CHANNEL DAC ACTIVE CODE REGISTER PER CHANNEL DIGITAL INPUT THRESHOLD REGISTER ADC CONVERSION CONTROL REGISTER DIAGNOSTICS SELECT REGISTER DIGITAL OUTPUT LEVEL REGISTER ADC CONVERSION RESULTS REGISTER PER CHANNEL DIAGNOSTIC RESULTS REGISTERS PER DIAGNOSTIC CHANNEL ALERT STATUS REGISTER LIVE STATUS REGISTER ALERT MASK REGISTER READBACK SELECT REGISTER 80 SPS ADC CONVERSION CONTROL REGISTER THERMAL RESET ENABLE REGISTER COMMAND REGISTER SCRATCH OR SPARE REGISTER SILICON REVISION REGISTER OUTLINE DIMENSIONS ORDERING GUIDE