Datasheet LT3002 (Analog Devices) - 6

link to page 7 LT3002
APPLICATIONS INFORMATION Output Voltage
tOFF(MIN) = Minimum switch-off time = 350ns (TYP) The RFB and RREF resistors are external resistors used to ISW(MIN) = Minimum switch current limit = 0.87A (TYP) program the output voltage. In addition to the primary inductance requirement for The output voltage is set by: the minimum switch-off time, the LT3002 has minimum ⎛ switch-on time that prevents the chip from turning on R ⎞ ⎛ 1 ⎞ V FB the power switch shorter than approximately 160ns. OUT = VREF • ⎝⎜ RREF ⎠⎟ •⎝⎜ NPS ⎠⎟ – VF This minimum switch-on time is mainly for leading-edge blanking the initial switch turn-on current spike. If the VF = Output diode forward voltage inductor current exceeds the desired current limit during NPS = Transformer effective primary-to-secondary that time, oscillation may occur at the output as the cur- turns ratio rent control loop will lose its ability to regulate. Therefore, V the following equation relating to maximum input voltage REF = Internal reference voltage 1.00V must also be followed in selecting primary-side magnetiz-
Output Temperature Compensation
ing inductance: To cancel the output diode temperature coefficient, the t L ON(MIN) • VIN(MAX) following two equations should be satisfied: PRI ≥ ISW(MIN) R 1 V FB tON(MIN) = Minimum switch-on time = 160ns (TYP) OUT = VREF • • – V ( ) R F T0 REF NPS In general, choose a transformer with its primary mag- netizing inductance about 40% to 60% larger than the ( R 1 V FB TC/ T) • • = –( VF/ T) minimum values calculated above. A transformer with RTC NPS much larger inductance will have a bigger physical size and may cause instability at light load. T0 =Room temperature 25°C ( V
Undervoltage Lockout (UVLO)
F / T) = Output diode forward voltage temperature coefficient A resistive divider from VIN to the EN/UVLO pin imple- ( V )=3.35mV/° TC / T C ments undervoltage lockout (UVLO). The EN/UVLO enable falling threshold is set at 1.214V with 14mV hysteresis. In addition, the EN/UVLO pin sinks 2.5µA when the voltage
Primary Inductance Requirement
on the pin is below 1.214V. This current provides user The LT3002 obtains output voltage information from the programmable hysteresis based on the value of R1. The reflected output voltage on the SW pin. The conduction of programmable UVLO thresholds are: secondary current reflects the output voltage on the pri- ( ) mary SW pin. The sample-and-hold error amplifier needs 1.228V • R1+R2 V = +2.5µA •R1 a minimum 350ns to settle and sample the reflected out- IN(UVLO+ ) R2 put voltage. In order to ensure proper sampling, the sec- 1.214V • R ( 1+R2) V = ondary winding needs to conduct current for a minimum IN(UVLO– ) R2 of 350ns. The following equation gives the minimum value for primary-side magnetizing inductance: Figure 1 shows the implementation of external shutdown control while still using the UVLO function. The NMOS t ( ) L OFF(MIN) •NPS • VOUT + VF grounds the EN/UVLO pin when turned on, and puts the PRI ≥ I LT3002 in shutdown with quiescent current less than 2µA. SW(MIN) Rev. 0 6 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Operation Applications Information Package Description