Datasheet TPD7107F (Toshiba) - 5
| Fabricante | Toshiba |
| Descripción | Intelligent Power Device Silicon Power MOS Integrated Circuit |
| Páginas / Página | 34 / 5 — TPD7107F. Figure 7.3 Timing chart of Active clamp operation. 7.3. Gate … |
| Formato / tamaño de archivo | PDF / 1.1 Mb |
| Idioma del documento | Inglés |
TPD7107F. Figure 7.3 Timing chart of Active clamp operation. 7.3. Gate drive of Power MOSFET (Off driver)
Línea de modelo para esta hoja de datos
Versión de texto del documento
TPD7107F
Active clamp. V IN VDD VSHUNT Vclamp V GATE ● VIN: IN pin input voltage ● VSHUNT: SHUNT pin input voltage ● VGATE: GATE pin output voltage ● Vclamp: Active clamp voltage
Figure 7.3 Timing chart of Active clamp operation. 7.3. Gate drive of Power MOSFET (Off driver)
Three kinds of drive circuits which control the turn-of of external FET exist in this products. Operation of each drive is explained below.
7.3.1. Normal off, rapid off
The normal off driver makes the external FET an OFF state via the IN pin. The rapid off driver operates and draws out the gate charge of the external FET quickly, when the latch is stopped by the anomaly detection. Whenever the rapid off driver operates, the normal off driver operates in paral el.
Figure 7.4 Off driver circuit.
© 2 020 5 2020-04-09 Toshiba Electronic Devices & Storage Corporation Document Outline 1. Description 2. Uses 3. Features 4. Block Diagram 5. Pin Assignments 6. Pin Description 7. Operational Description 7.1. Protection for reverse connection of power supply 7.2. Active clamp 7.3. Gate drive of Power MOSFET (Off driver) 7.3.1. Normal off, rapid off 7.3.2. Protection for disconnection of GND terminal 7.4. Load current sense at time of Power MOSFET drive 7.5. The abnormalities in power supply voltage (VDD over voltage, VDD under voltage) 7.6. Over current protection 7.7. Over temperature protection. 7.8. Abnormalities in voltage between Drain and source of the external FET (VDS error) 7.9. Load open / VDD short of load line and diagnosis output 7.10. Truth Table 7.11. State Transition Diagram 8. Absolute Maximum Ratings 8.1. Thermal Resistance 9. Operating Ranges 10. Electrical Characteristics 10.1. Electrical characteristics 1 10.2. Electrical characteristics 2 10.3. Current sense amp Electrical Characteristics 11. Test Circuit 11.1. Test circuit 1 High level output voltage (3) 11.2. Test circuit 2 Switching time (Td-ON, Td-OFF, Tr, Tf) 11.3. Test circuit 3 Off impedance at GND open 11.4. Test circuit 4 Input offset voltage 12. Characteristic curves 13. Package Information 13.1. Package Dimensions 13.2. Marking 13.3. Land Pattern Dimensions for Reference only 14. IC Usage Notes 14.1. Notes on Handling of ICs 14.2. Notes on mounting. RESTRICTIONS ON PRODUCT USE
Active clamp. V IN VDD VSHUNT Vclamp V GATE ● VIN: IN pin input voltage ● VSHUNT: SHUNT pin input voltage ● VGATE: GATE pin output voltage ● Vclamp: Active clamp voltage
Figure 7.3 Timing chart of Active clamp operation. 7.3. Gate drive of Power MOSFET (Off driver)
Three kinds of drive circuits which control the turn-of of external FET exist in this products. Operation of each drive is explained below.
7.3.1. Normal off, rapid off
The normal off driver makes the external FET an OFF state via the IN pin. The rapid off driver operates and draws out the gate charge of the external FET quickly, when the latch is stopped by the anomaly detection. Whenever the rapid off driver operates, the normal off driver operates in paral el.
Figure 7.4 Off driver circuit.
© 2 020 5 2020-04-09 Toshiba Electronic Devices & Storage Corporation Document Outline 1. Description 2. Uses 3. Features 4. Block Diagram 5. Pin Assignments 6. Pin Description 7. Operational Description 7.1. Protection for reverse connection of power supply 7.2. Active clamp 7.3. Gate drive of Power MOSFET (Off driver) 7.3.1. Normal off, rapid off 7.3.2. Protection for disconnection of GND terminal 7.4. Load current sense at time of Power MOSFET drive 7.5. The abnormalities in power supply voltage (VDD over voltage, VDD under voltage) 7.6. Over current protection 7.7. Over temperature protection. 7.8. Abnormalities in voltage between Drain and source of the external FET (VDS error) 7.9. Load open / VDD short of load line and diagnosis output 7.10. Truth Table 7.11. State Transition Diagram 8. Absolute Maximum Ratings 8.1. Thermal Resistance 9. Operating Ranges 10. Electrical Characteristics 10.1. Electrical characteristics 1 10.2. Electrical characteristics 2 10.3. Current sense amp Electrical Characteristics 11. Test Circuit 11.1. Test circuit 1 High level output voltage (3) 11.2. Test circuit 2 Switching time (Td-ON, Td-OFF, Tr, Tf) 11.3. Test circuit 3 Off impedance at GND open 11.4. Test circuit 4 Input offset voltage 12. Characteristic curves 13. Package Information 13.1. Package Dimensions 13.2. Marking 13.3. Land Pattern Dimensions for Reference only 14. IC Usage Notes 14.1. Notes on Handling of ICs 14.2. Notes on mounting. RESTRICTIONS ON PRODUCT USE