Datasheet TPD7106F (Toshiba) - 4

TPD7106F 7. Operational Description 7.1. Gate drive of Power MOSFET 7.1.1. On driver
In response to FET turn-on instructions (VIN1=VIH), a charge pump circuit and the drive circuit operate from input terminal IN1, and it drives N channel power MOSFET of a high side with sufficient gate voltage. (VOUT1=VDD+12V (typ.)) VIN1: IN1 pin input voltage VIH: High level input voltage VOUT1: OUT1 pin output voltage
7.1.2. Off driver (Normal Off)
The OFF operation in normal turns off external FET by M2 in Figure 7.1 in response to FET drive instructions (VIN1=VIL) from input terminal IN1 (drive on resistance = 630Ω (typ.)). VIL: Low level input voltage
7.1.3. Off driver (Rapid Off)
Abnormalities, such as external FET and short circuits which occurred around load, are detected, and when it is required to make external FET turn off for a short time, in response to FET rapid OFF instructions (VIN2=VIH), the following figure M3 operates from input terminal IN2, and it turns off external FET quickly (Driver on resistance = 5Ω (typ.)). In addition, although rapid off-driver operating time (tO2ON) is a maximum of 200μs. VIN2: IN2 pin input voltage CP drive CPV VDD M1 OUT1 OUT2 M2 M3 M4 ad o L GND2
Figure 7.1 Output driver part.
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