Datasheet LT5401 (Analog Devices) - 10

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APPLICATIONS INFORMATION
stray capacitance. The layout of an LT5401 and FDA must the correct (Figure 3a) and incorrect (Figure 3b) ways to preserve the outstanding resistor network matching to configure the LT5401 as a fully differential amplifier. minimize the error due to any trace resistance match- Figure 3a correctly connects tap points T1B and T2B to ing. The copper trace resistance is 0.25mΩ ±15% and the amplifier’s high impedance inputs and uses the IN 0.5mΩ ±15% per square trace area for 2oz and 1oz cop- and OUT pins. per, respectively. For example, for 0dB gain, ±30ppm matching of 1050Ω resistors is ±31.5mΩ. If the trace Figure 3b incorrectly uses tap points T1C and T2C to con- length is 0.2-inch, the resistance of a 20mil wide trace for nect to the amplifier’s outputs. This incorrect configuration 2oz copper is 2.5mΩ. Even an arbitrary ±30% matching will incur significant gain, CMRR and drift errors because of the error is ±0.75mΩ, adding less than ±1ppm error. In the parasitic resistance in series with T1C and T2C. addition, the trace resistance ratio temperature drift will Figure 4 shows the LT5401 being used to setup two buff- not degrade the LT5401 ratio temperature drift (1ppm/°C ered voltage dividers. max). For example, the temperature coefficient of a cop- per resistance 0.4%/°C. A 100°C temperature rise from The top example in Figure  4 is correctly configured 25°C to 125°C increases the 2.5mΩ trace to 3.5mΩ. An because no current is conducted in any of the tap points. arbitrary ±30% matching error is ±0.3mΩ, adding less T1B is connected to a high impedance amplifier input and than ±0.3ppm temperature error. current only flows in IN1 and OUT1. The bottom example in Figure 4 is incorrectly configured
Configuring the LT5401
because tap point T2C has been grounded and will con- The LT5401 consists of two sets of matched 4-segment duct current. When incorrectly configured like this, the resistors. Each resistor string has three tap points which parasitic resistance in series with tap point T2C will cause are intended to connect to a high impedance such as an a significant error and drift in the divider ratio. Also, had amplifier’s input. Each tap point has parasitic metal resis- T2A not been buffered with the amplifier shown, any load- tance RP as shown in Figure 3. To preserve the match- ing on T2A would cause current flow in T2A and result in ing performance of the LT5401, no current should be significant error and drift in the divider ratio. conducted in any of the tap points. Figure 3 illustrates LT5401 OUT1 LT5401 OUT1 R1D R1D RP T1C RP T1C R1C R1C RP T1B RP T1B +5V +5V R1B +IN +IN R1B + + IN1 R1A RP T1A R1A R –V IN1 P T1A V OUT –VOUT OCM VOCM V R2A ADA4945-1 R R2A ADA4945-1 R IN IN2 P T2A VIN IN2 P T2A –IN +VOUT +VOUT R2B – –IN R R2B P T2B RP T2B – –5V –5V R2C R R2C P T2C RP T2C R2D R2D OUT2 OUT2 5401 F03
(a) CORRECT Way to Configure (b) INCORRECT Way to Configure Figure 3. Fully Differential Amplifier
Rev. 0 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Typical Application Related Parts