link to page 9 EiceDRIVER™ 1EDN7550 and 1EDN8550Single-channel EiceDRIVER™ gate-drive IC with true differential inputsElectrical characteristics and parameters4.3Operating rangeTable 7Operating RangeParameterSymbolValuesUnitNote or Test ConditionMin.Typ.Max. Supply voltage VDD 4.5 – 20 V Min defined by UVLO Voltage at pins IN+ and IN- VIN -7 – 6 V – Junction temperature Tj -40 – 150 °C 12)4.4Electrical characteristics Unless otherwise noted, min./max. values of characteristics are the lower and upper limits, respectively. They are valid within the full operating range. The supply voltage is VDD= 12 V. Typical values are given at Tj=25°C. Table 8Power SupplyParameterSymbolValuesUnitNote or Test ConditionMin.Typ.Max. VDD quiescent current IVDDh – 1.1 – mA OUT = high VDD quiescent current IVDDl – 0.9 – mA OUT = low Table 9Undervoltage Lockout 1EDN7550x (Logic level MOSFET)ParameterSymbolValuesUnitNote or Test ConditionMin.Typ.Max. Undervoltage Lockout (UVLO) UVLOon 3.9 4.2 4.5 V – turn on threshold Undervoltage Lockout (UVLO) UVLOoff – 3.9 – V – turn off threshold UVLO threshold hysteresis UVLOhys 0.25 0.3 0.35 V – Table 10Undervoltage Lockout 1EDN8550B (Standard MOSFET)ParameterSymbolValuesUnitNote or Test ConditionMin.Typ.Max. Undervoltage Lockout (UVLO) UVLOon 7.4 8.0 8.6 V – turn on threshold Undervoltage Lockout (UVLO) UVLOoff – 7.0 – V – turn off threshold UVLO threshold hysteresis UVLOhys 0.8 1.0 1.2 V – 12 Continuous operation above 125°C may reduce life time Datasheet 9 Rev. 2.2 2019-12-09 Document Outline Features Description Table of contents 1 Pin configuration and description 2 Block diagram 3 Functional description 3.1 Differential input 3.1.1 Common mode input range 3.2 Driver outputs 3.3 Supply voltage and Undervoltage Lockout (UVLO) 4 Electrical characteristics and parameters 4.1 Absolute maximum ratings 4.2 Thermal characteristics 4.3 Operating range 4.4 Electrical characteristics 4.5 Timing diagram 5 Typical characteristics 6 Typical applications 6.1 Switches with Kelvin source connection (4-pin packages) 6.2 Applications with significant parasitic PCB-inductances 6.3 Switches with bipolar gate drive 6.4 High-side switches 7 Layout guidelines 8 Package information 8.1 PG-SOT23-6 package 8.2 PG-TSNP-6 package 9 Device numbers and markings Revision history Disclaimer