Datasheet EFR32MG22 (Silicon Labs) - 4
| Fabricante | Silicon Labs |
| Descripción | Wireless Gecko SoC Family |
| Páginas / Página | 101 / 4 — Table of Contents. 1. Feature List. . 2. 2. Ordering Information. . 3. 3. … |
| Formato / tamaño de archivo | PDF / 1.3 Mb |
| Idioma del documento | Inglés |
Table of Contents. 1. Feature List. . 2. 2. Ordering Information. . 3. 3. System Overview. . 7. silabs.com
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Table of Contents 1. Feature List . 2 2. Ordering Information . 3 3. System Overview . 7
3.1 Introduction . 7 3.2 Radio . 7 3.2.1 Antenna Interface . 7 3.2.2 Fractional-N Frequency Synthesizer . 8 3.2.3 Receiver Architecture . 8 3.2.4 Transmitter Architecture . 8 3.2.5 Packet and State Trace . 8 3.2.6 Data Buffering. 8 3.2.7 Radio Controller (RAC). 8 3.2.8 RFSENSE Interface . 9 3.3 General Purpose Input/Output (GPIO) . 9 3.4 Clocking . 9 3.4.1 Clock Management Unit (CMU) . 9 3.4.2 Internal and External Oscillators. 9 3.5 Counters/Timers and PWM . 9 3.5.1 Timer/Counter (TIMER) . 9 3.5.2 Low Energy Timer (LETIMER) . .10 3.5.3 Real Time Clock with Capture (RTCC) . .10 3.5.4 Back-Up Real Time Counter . .10 3.5.5 Watchdog Timer (WDOG) . .10 3.6 Communications and Other Digital Peripherals . .10 3.6.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) . .10 3.6.2 Enhanced Universal Asynchronous Receiver/Transmitter (EUART) . .10 3.6.3 Inter-Integrated Circuit Interface (I2C) . .10 3.6.4 Peripheral Reflex System (PRS) . .11 3.6.5 Pulse Density Modulation (PDM) Interface . .11 3.7 Security Features . .11 3.7.1 Secure Boot with Root of Trust and Secure Loader (RTSL) . .11 3.7.2 Cryptographic Accelerator. .11 3.7.3 True Random Number Generator . .11 3.7.4 Secure Debug with Lock/Unlock. .12 3.8 Analog. .12 3.8.1 Analog to Digital Converter (IADC) . .12 3.9 Power . .13 3.9.1 Energy Management Unit (EMU) . .13 3.9.2 Voltage Scaling . .13 3.9.3 DC-DC Converter . .13 3.9.4 Power Domains . .13 3.10 Reset Management Unit (RMU) . .14
silabs.com
| Building a more connected world. Preliminary Rev. 0.5 | 4 Document Outline 1. Feature List 2. Ordering Information 3. System Overview 3.1 Introduction 3.2 Radio 3.2.1 Antenna Interface 3.2.2 Fractional-N Frequency Synthesizer 3.2.3 Receiver Architecture 3.2.4 Transmitter Architecture 3.2.5 Packet and State Trace 3.2.6 Data Buffering 3.2.7 Radio Controller (RAC) 3.2.8 RFSENSE Interface 3.3 General Purpose Input/Output (GPIO) 3.4 Clocking 3.4.1 Clock Management Unit (CMU) 3.4.2 Internal and External Oscillators 3.5 Counters/Timers and PWM 3.5.1 Timer/Counter (TIMER) 3.5.2 Low Energy Timer (LETIMER) 3.5.3 Real Time Clock with Capture (RTCC) 3.5.4 Back-Up Real Time Counter 3.5.5 Watchdog Timer (WDOG) 3.6 Communications and Other Digital Peripherals 3.6.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) 3.6.2 Enhanced Universal Asynchronous Receiver/Transmitter (EUART) 3.6.3 Inter-Integrated Circuit Interface (I2C) 3.6.4 Peripheral Reflex System (PRS) 3.6.5 Pulse Density Modulation (PDM) Interface 3.7 Security Features 3.7.1 Secure Boot with Root of Trust and Secure Loader (RTSL) 3.7.2 Cryptographic Accelerator 3.7.3 True Random Number Generator 3.7.4 Secure Debug with Lock/Unlock 3.8 Analog 3.8.1 Analog to Digital Converter (IADC) 3.9 Power 3.9.1 Energy Management Unit (EMU) 3.9.2 Voltage Scaling 3.9.3 DC-DC Converter 3.9.4 Power Domains 3.10 Reset Management Unit (RMU) 3.11 Core and Memory 3.11.1 Processor Core 3.11.2 Memory System Controller (MSC) 3.11.3 Linked Direct Memory Access Controller (LDMA) 3.12 Memory Map 3.13 Configuration Summary 4. Electrical Specifications 4.1 Electrical Characteristics 4.2 Absolute Maximum Ratings 4.3 General Operating Conditions 4.4 DC-DC Converter 4.4.1 DC-DC Operating Limits 4.5 Thermal Characteristics 4.6 Current Consumption 4.6.1 MCU current consumption using DC-DC at 3.0 V input 4.6.2 MCU current consumption at 3.0 V 4.6.3 MCU current consumption at 1.8 V 4.6.4 Radio current consumption at 3.0V using DCDC 4.7 Flash Characteristics 4.8 Wake Up, Entry, and Exit times 4.9 RFSENSE Low-energy Wake-on-RF 4.10 2.4 GHz RF Transceiver Characteristics 4.10.1 RF Transmitter Characteristics 4.10.1.1 RF Transmitter General Characteristics for the 2.4 GHz Band 4.10.1.2 RF Transmitter Characteristics for 802.15.4 DSSS-OQPSK in the 2.4 GHz Band 4.10.1.3 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 1 Mbps Data Rate 4.10.1.4 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 2 Mbps Data Rate 4.10.1.5 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 500 kbps Data Rate 4.10.1.6 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 125 kbps Data Rate 4.10.2 RF Receiver Characteristics 4.10.2.1 RF Receiver General Characteristics for the 2.4 GHz Band 4.10.2.2 RF Receiver Characteristics for 802.15.4 DSSS-OQPSK in the 2.4 GHz Band 4.10.2.3 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 1 Mbps Data Rate 4.10.2.4 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 2 Mbps Data Rate 4.10.2.5 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 500 kbps Data Rate 4.10.2.6 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 125 kbps Data Rate 4.11 Oscillators 4.11.1 High Frequency Crystal Oscillator 4.11.2 Low Frequency Crystal Oscillator 4.11.3 High Frequency RC Oscillator (HFRCO) 4.11.4 Fast Start_Up RC Oscillator (FSRCO) 4.11.5 Precision Low Frequency RC Oscillator (LFRCO) 4.11.6 Ultra Low Frequency RC Oscillator 4.12 GPIO Pins (3V GPIO pins) 4.13 Analog to Digital Converter (IADC) 4.14 Temperature Sense 4.15 Brown Out Detectors 4.15.1 DVDD BOD 4.15.2 LE DVDD BOD 4.15.3 AVDD and IOVDD BODs 4.16 PDM Timing Specifications 4.16.1 Pulse Density Modulator (PDM), Common DBUS 4.17 USART SPI Master Timing 4.17.1 SPI Master Timing, Voltage Scaling = VSCALE2 4.17.2 SPI Master Timing, Voltage Scaling = VSCALE1 4.18 USART SPI Slave Timing 4.18.1 SPI Slave Timing, Voltage Scaling = VSCALE2 4.18.2 SPI Slave Timing, Voltage Scaling = VSCALE1 4.19 I2C Electrical Specifications 4.19.1 I2C Standard-mode (Sm) 4.19.2 I2C Fast-mode (Fm) 4.19.3 I2C Fast-mode Plus (Fm+) 4.20 Typical Performance Curves 4.20.1 Supply Current 4.20.2 RF Characteristics 4.20.3 DC-DC Converter 5. Typical Connections 5.1 Power 5.2 RF Matching Networks 5.2.1 2.4 GHz Matching Network 5.3 Other Connections 6. Pin Definitions 6.1 QFN40 Device Pinout 6.2 TQFN32 Device Pinout 6.3 QFN32 Device Pinout 6.4 Alternate Function Table 6.5 Analog Peripheral Connectivity 6.6 Digital Peripheral Connectivity 7. QFN32 Package Specifications 7.1 QFN32 Package Dimensions 7.2 QFN32 PCB Land Pattern 7.3 QFN32 Package Marking 8. TQFN32 Package Specifications 8.1 TQFN32 Package Dimensions 8.2 TQFN32 PCB Land Pattern 8.3 TQFN32 Package Marking 9. QFN40 Package Specifications 9.1 QFN40 Package Dimensions 9.2 QFN40 PCB Land Pattern 9.3 QFN40 Package Marking 10. Revision History
Table of Contents 1. Feature List . 2 2. Ordering Information . 3 3. System Overview . 7
3.1 Introduction . 7 3.2 Radio . 7 3.2.1 Antenna Interface . 7 3.2.2 Fractional-N Frequency Synthesizer . 8 3.2.3 Receiver Architecture . 8 3.2.4 Transmitter Architecture . 8 3.2.5 Packet and State Trace . 8 3.2.6 Data Buffering. 8 3.2.7 Radio Controller (RAC). 8 3.2.8 RFSENSE Interface . 9 3.3 General Purpose Input/Output (GPIO) . 9 3.4 Clocking . 9 3.4.1 Clock Management Unit (CMU) . 9 3.4.2 Internal and External Oscillators. 9 3.5 Counters/Timers and PWM . 9 3.5.1 Timer/Counter (TIMER) . 9 3.5.2 Low Energy Timer (LETIMER) . .10 3.5.3 Real Time Clock with Capture (RTCC) . .10 3.5.4 Back-Up Real Time Counter . .10 3.5.5 Watchdog Timer (WDOG) . .10 3.6 Communications and Other Digital Peripherals . .10 3.6.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) . .10 3.6.2 Enhanced Universal Asynchronous Receiver/Transmitter (EUART) . .10 3.6.3 Inter-Integrated Circuit Interface (I2C) . .10 3.6.4 Peripheral Reflex System (PRS) . .11 3.6.5 Pulse Density Modulation (PDM) Interface . .11 3.7 Security Features . .11 3.7.1 Secure Boot with Root of Trust and Secure Loader (RTSL) . .11 3.7.2 Cryptographic Accelerator. .11 3.7.3 True Random Number Generator . .11 3.7.4 Secure Debug with Lock/Unlock. .12 3.8 Analog. .12 3.8.1 Analog to Digital Converter (IADC) . .12 3.9 Power . .13 3.9.1 Energy Management Unit (EMU) . .13 3.9.2 Voltage Scaling . .13 3.9.3 DC-DC Converter . .13 3.9.4 Power Domains . .13 3.10 Reset Management Unit (RMU) . .14
silabs.com
| Building a more connected world. Preliminary Rev. 0.5 | 4 Document Outline 1. Feature List 2. Ordering Information 3. System Overview 3.1 Introduction 3.2 Radio 3.2.1 Antenna Interface 3.2.2 Fractional-N Frequency Synthesizer 3.2.3 Receiver Architecture 3.2.4 Transmitter Architecture 3.2.5 Packet and State Trace 3.2.6 Data Buffering 3.2.7 Radio Controller (RAC) 3.2.8 RFSENSE Interface 3.3 General Purpose Input/Output (GPIO) 3.4 Clocking 3.4.1 Clock Management Unit (CMU) 3.4.2 Internal and External Oscillators 3.5 Counters/Timers and PWM 3.5.1 Timer/Counter (TIMER) 3.5.2 Low Energy Timer (LETIMER) 3.5.3 Real Time Clock with Capture (RTCC) 3.5.4 Back-Up Real Time Counter 3.5.5 Watchdog Timer (WDOG) 3.6 Communications and Other Digital Peripherals 3.6.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) 3.6.2 Enhanced Universal Asynchronous Receiver/Transmitter (EUART) 3.6.3 Inter-Integrated Circuit Interface (I2C) 3.6.4 Peripheral Reflex System (PRS) 3.6.5 Pulse Density Modulation (PDM) Interface 3.7 Security Features 3.7.1 Secure Boot with Root of Trust and Secure Loader (RTSL) 3.7.2 Cryptographic Accelerator 3.7.3 True Random Number Generator 3.7.4 Secure Debug with Lock/Unlock 3.8 Analog 3.8.1 Analog to Digital Converter (IADC) 3.9 Power 3.9.1 Energy Management Unit (EMU) 3.9.2 Voltage Scaling 3.9.3 DC-DC Converter 3.9.4 Power Domains 3.10 Reset Management Unit (RMU) 3.11 Core and Memory 3.11.1 Processor Core 3.11.2 Memory System Controller (MSC) 3.11.3 Linked Direct Memory Access Controller (LDMA) 3.12 Memory Map 3.13 Configuration Summary 4. Electrical Specifications 4.1 Electrical Characteristics 4.2 Absolute Maximum Ratings 4.3 General Operating Conditions 4.4 DC-DC Converter 4.4.1 DC-DC Operating Limits 4.5 Thermal Characteristics 4.6 Current Consumption 4.6.1 MCU current consumption using DC-DC at 3.0 V input 4.6.2 MCU current consumption at 3.0 V 4.6.3 MCU current consumption at 1.8 V 4.6.4 Radio current consumption at 3.0V using DCDC 4.7 Flash Characteristics 4.8 Wake Up, Entry, and Exit times 4.9 RFSENSE Low-energy Wake-on-RF 4.10 2.4 GHz RF Transceiver Characteristics 4.10.1 RF Transmitter Characteristics 4.10.1.1 RF Transmitter General Characteristics for the 2.4 GHz Band 4.10.1.2 RF Transmitter Characteristics for 802.15.4 DSSS-OQPSK in the 2.4 GHz Band 4.10.1.3 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 1 Mbps Data Rate 4.10.1.4 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 2 Mbps Data Rate 4.10.1.5 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 500 kbps Data Rate 4.10.1.6 RF Transmitter Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 125 kbps Data Rate 4.10.2 RF Receiver Characteristics 4.10.2.1 RF Receiver General Characteristics for the 2.4 GHz Band 4.10.2.2 RF Receiver Characteristics for 802.15.4 DSSS-OQPSK in the 2.4 GHz Band 4.10.2.3 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 1 Mbps Data Rate 4.10.2.4 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 2 Mbps Data Rate 4.10.2.5 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 500 kbps Data Rate 4.10.2.6 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 125 kbps Data Rate 4.11 Oscillators 4.11.1 High Frequency Crystal Oscillator 4.11.2 Low Frequency Crystal Oscillator 4.11.3 High Frequency RC Oscillator (HFRCO) 4.11.4 Fast Start_Up RC Oscillator (FSRCO) 4.11.5 Precision Low Frequency RC Oscillator (LFRCO) 4.11.6 Ultra Low Frequency RC Oscillator 4.12 GPIO Pins (3V GPIO pins) 4.13 Analog to Digital Converter (IADC) 4.14 Temperature Sense 4.15 Brown Out Detectors 4.15.1 DVDD BOD 4.15.2 LE DVDD BOD 4.15.3 AVDD and IOVDD BODs 4.16 PDM Timing Specifications 4.16.1 Pulse Density Modulator (PDM), Common DBUS 4.17 USART SPI Master Timing 4.17.1 SPI Master Timing, Voltage Scaling = VSCALE2 4.17.2 SPI Master Timing, Voltage Scaling = VSCALE1 4.18 USART SPI Slave Timing 4.18.1 SPI Slave Timing, Voltage Scaling = VSCALE2 4.18.2 SPI Slave Timing, Voltage Scaling = VSCALE1 4.19 I2C Electrical Specifications 4.19.1 I2C Standard-mode (Sm) 4.19.2 I2C Fast-mode (Fm) 4.19.3 I2C Fast-mode Plus (Fm+) 4.20 Typical Performance Curves 4.20.1 Supply Current 4.20.2 RF Characteristics 4.20.3 DC-DC Converter 5. Typical Connections 5.1 Power 5.2 RF Matching Networks 5.2.1 2.4 GHz Matching Network 5.3 Other Connections 6. Pin Definitions 6.1 QFN40 Device Pinout 6.2 TQFN32 Device Pinout 6.3 QFN32 Device Pinout 6.4 Alternate Function Table 6.5 Analog Peripheral Connectivity 6.6 Digital Peripheral Connectivity 7. QFN32 Package Specifications 7.1 QFN32 Package Dimensions 7.2 QFN32 PCB Land Pattern 7.3 QFN32 Package Marking 8. TQFN32 Package Specifications 8.1 TQFN32 Package Dimensions 8.2 TQFN32 PCB Land Pattern 8.3 TQFN32 Package Marking 9. QFN40 Package Specifications 9.1 QFN40 Package Dimensions 9.2 QFN40 PCB Land Pattern 9.3 QFN40 Package Marking 10. Revision History