Datasheet 8V97003 (IDT) - 7

link to page 51 link to page 52 link to page 52 link to page 52 link to page 53 link to page 53 link to page 53 link to page 55 link to page 55 link to page 55 link to page 62 link to page 62 8V97003 Datasheet Table 49. Charge Pump Control Register Descriptions .. 51 Table 50. Re-Sync Control Register Block.. 52 Table 51. Re-sync Control Register Bits... 52 Table 52. Re-sync Control Register Descriptions ... 52 Table 53. Output Control Register Block... 53 Table 54. Output Control Register Bits ... 53 Table 55. Output Control Register Descriptions.. 53 Table 56. Status Register Block.. 55 Table 57. Status Register Bits .. 55 Table 58. Status Register Descriptions... 55 Table 59. Ordering Information . ... 62 Table 60. Pin 1 Orientation in Tape and Reel Packaging ... 62 ©2020 Renesas Electronics Corporation 7 January 20, 2020 Document Outline Description Typical Applications Features Simplified Block Diagram Block Diagram Contents List of Figures List of Tables Pin Assignments Pin Descriptions Absolute Maximum Ratings Recommended Operating Conditions Thermal Characteristics and Reliability Information DC Electrical Characteristics AC Electrical Characteristics Typical Performance Characteristics Theory of Operation Synthesizer Programming Reference Input Stage Input Reference Divider (R) Reference Doubler Reference Multiplier (MULT) Feedback Divider Phase and Frequency Detector (PFD) and Charge Pump PFD Frequency External Loop Filter Charge Pump High-Impedance Integrated Low Noise VCO Output Clock Distribution and Optional Output Doubler Output Matching Band Selection Disable Phase Adjust RF Output Power Output Phase Synchronization Power-Down Mode Default Power-Up Conditions VCO Calibration 3- or 4-Wire SPI Interface Description 3/4-Wire Mode Active Clock Edge Reset Least Significant Bit Position Addressing Read Operation Mirrored Register Bits Double-Buffered Registers Operation Protocols Register Map Register Block Descriptions Preface Registers Feedback Divider Control Registers Phase Adjustments Control Registers DSM Control Registers Calibration Control Registers Band Select Clock Divider Control Registers Lock Detect Control Registers Power Down Control Registers Input Control Registers Charge Pump Control Registers Re-Sync Control Registers Output Control Registers Status Registers Applications Information Loop Filter Calculations Recommendations for Unused Input and Output Pins Schematic Example Power Considerations Package Outline Drawings Marking Diagram Ordering Information Revision History