Datasheet LTC4070 (Analog Devices) - 7

link to page 7 LTC4070
OPERATION
The LTC4070 provides a simple, reliable, and high perfor- thermistor with a B25/85 value of 3490 such as the Vishay mance battery protection and charging solution by prevent- NTHS0402N02N1002F, and a 10k NTCBIAS resistor, each ing the battery voltage from exceeding a programmed level. 10°C increase in temperature above 40°C causes the float Its shunt architecture requires just one resistor between voltage to drop by a fixed amount, ∆VFLOAT(NTC), depend- the input supply and the battery to handle a wide range of ing on ADJ. If ADJ is at GND, the float voltage steps down battery applications. When the input supply is removed and by 50mV for each 10°C temperature increment. If ADJ the battery voltage is below the high battery output thresh- is floating, the step size is 75mV. And if ADJ is at VCC, old, the LTC4070 consumes just 450nA from the battery. the step size is 100mV. Refer to Table 1 for the range of While the battery voltage is below the programmed float VFLOAT_EFF programming. voltage, the charge rate is determined by the input volt-
Table 1. NTC Qualified Float Voltage
age, the battery voltage, and the input resistor:
VFLOAT_ ADJ
∆
V
(
FLOAT(NTC) TEMPERATURE VNTC AS % OF NTCBIAS EFF
V ) I IN – VBAT GND 50mV T < 40°C VNTC > 36.5% 4.000V CHG = 40°C ≤ T < 50°C 29.0% < V 3.950V RIN NTC ≤ 36.5% 50°C ≤ T < 60°C 22.8% < VNTC ≤ 29.0% 3.900V As the battery voltage approaches the float voltage, the 60°C ≤ T < 70°C 17.8% < VNTC ≤ 22.8% 3.850V LTC4070 shunts current away from the battery thereby 70°C < T VNTC ≤ 17.8% 3.800V reducing the charge current. The LTC4070 can shunt up Float 75mV T < 40°C VNTC > 36.5% 4.100V 40°C ≤ T < 50°C 29.0% < VNTC ≤ 36.5% 4.025V to 50mA with float voltage accuracy of ±1% over tem- 50°C ≤ T < 60°C 22.8% < VNTC ≤ 29.0% 3.950V perature. The shunt current limits the maximum charge 60°C ≤ T < 70°C 17.8% < VNTC ≤ 22.8% 3.875V 70°C ≤ T V 3.800V current, but the 50mA internal capability can be increased NTC ≤ 17.8% V V 4.200V by adding an external P-channel MOSFET. CC 100mV T < 40°C NTC > 36.5% 40°C ≤ T < 50°C 29.0% < VNTC ≤ 36.5% 4.100V 50°C ≤ T < 60°C 22.8%< VNTC ≤ 29.0% 4.000V
Adjustable Float Voltage, V
60°C ≤ T < 70°C 17.8% < V 3.900V
FLOAT
NTC ≤ 22.8% 70°C ≤ T VNTC ≤ 17.8% 3.800V A built-in 3-state decoder connected to the ADJ pin pro- For all ADJ pin settings the lowest float voltage setting is vides three programmable float voltages: 4.0V, 4.1V, or 3.8V = V 4.2V. The float voltage is programmed to 4.0V when ADJ FLOAT – 4•�VFLOAT(NTC) = VFLOAT_MIN. This occurs at NTC thermistor temperatures above 70°C, or if the NTC is tied to GND, 4.1V when ADJ is floating, and 4.2V when pin is grounded. ADJ is tied to VCC. The state of the ADJ pin is sampled about once every 1.5 seconds. When it is being sampled, To conserve power in the NTCBIAS and NTC resistors, the the LTC4070 applies a relatively low impedance voltage NTCBIAS pin is sampled at a low duty cycle at the same at the ADJ pin. This technique prevents low level board time that the ADJ pin state is sampled. leakage from corrupting the programmed float voltage.
High Battery Status Output: HBO NTC Qualified Float Voltage, ∆VFLOAT(NTC)
The HBO pin pulls high when VCC rises to within VHBTH of The NTC pin voltage is compared against an internal resis- the programmed float voltage, VFLOAT_EFF, including NTC tor divider tied to the NTCBIAS pin. This divider has tap qualified float voltage adjustments. points that are matched to the NTC thermistor resistance/ If V temperature conversion table for a Vishay thermistor with CC drops below the float voltage by more than VHBTH + V a B HBHY the HBO pin pulls low to indicate that the battery is 25/85 value of 3490 at temperatures of 40°C, 50°C, not at full charge. The input supply current of the LTC4070 60°C, and 70°C. drops to less than 450nA (typ) as the LTC4070 no lon- Battery temperature conditioning adjusts the float volt- ger shunts current to protect the battery. The NTCBIAS age down to VFLOAT_EFF when the NTC thermistor indi- sample clock slows to conserve power, and the DRV pin cates that the battery temperature is too high. For a 10k is pulled up to VCC. Rev. D For more information www.analog.com 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts