Datasheet STUSB4500L (STMicroelectronics) - 9
| Fabricante | STMicroelectronics |
| Descripción | Standalone USB Type-C sink port controller |
| Páginas / Página | 32 / 9 — STUSB4500L. Description of the features. 3.1. CC interface. 3.2. VBUS … |
| Formato / tamaño de archivo | PDF / 1.8 Mb |
| Idioma del documento | Inglés |
STUSB4500L. Description of the features. 3.1. CC interface. 3.2. VBUS power path control. 3.2.1. VBUS monitoring. 3.2.2. VBUS discharge
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STUSB4500L Description of the features 3 Description of the features 3.1 CC interface
The STUSB4500L controls the connection to the configuration channel (CC) pins, CC1 and CC2, through two main blocks: the CC line interface block and the CC control logic block. The CC line interface block is used to: • Set pull-down termination mode on the CC pins • Monitor the CC pin voltage values related to the attachment detection thresholds • Protect the CC pins against overvoltage The CC control logic block is used to: • Execute the Type-C FSM related to the sink power role with debug accessory support • Determine the electrical state for each CC pin related to the detected thresholds • Evaluate the conditions related to the CC pin states and the VBUS voltage value to transition from one state to another in the Type-C FSM • Advertise a valid source-to-sink connection • Determine the identity of the attached device: source or debug accessory • Determine cable orientation to allow external routing of the USB data • Manage USB Type-C power capability on VBUS: USB default, medium or high current mode • Handle hardware faults
3.2 VBUS power path control 3.2.1 VBUS monitoring
The VBUS monitoring block supervises from the VBUS_VS_DISCH input pin the VBUS voltage on the USB Type-C receptacle side. It is used to check that VBUS is within a valid voltage range to establish a valid source-to-sink connection and to enable safely the VBUS power path through the VBUS_EN_SNK pin. It allows detection of unexpected VBUS voltage conditions such as undervoltage or overvoltage related to the valid VBUS voltage range. When such conditions occur, the STUSB4500L reacts as follows: • At attachment, it prevents the source-to-sink connection to be established and the VBUS power path to be asserted • After attachment, it goes into unattached state and it disables the VBUS power path The valid VBUS voltage range is defined by a low limit VTHUSB and a high limit VMONUSBH (overvoltage condition): • VTHUSB low limit is fixed by hardware at 3.3 V in order to detect a VBUS rising edge (connection) or falling edge (disconnection) • The minimum value of VMONUSBH is VBUS +5% and can be shifted by fraction of 1% from VBUS+5% to VBUS +20%. The value is preset by default in the NVM (see Section 7.3 Electrical and timing characteristics) and can be changed independently through NVM programming (see Section 5 Start-up configuration)
3.2.2 VBUS discharge
The monitoring block also handles the VBUS discharge paths connected to the VBUS_VS_DISCH pin for the USB Type-C receptacle side and to the DISCH pin for the power system side. The discharge paths are activated at the same time when disconnection is detected or when the device goes into the error recovery state (see Section 3.5 Hardware fault management ). At detachment, during error recovery state, the discharge is activated for TDISUSB0V time.
DS13102
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Rev 2 page 9/32
Document Outline Cover image Product status link / summary Product status link / summary Features Applications Description 1 Functional description 1.1 Block overview 2 Inputs/outputs 2.1 Pinout 2.2 Pin description 2.2.1 CC1 / CC2 2.2.2 CC1DB / CC2DB 2.2.3 RESET 2.2.4 I²C interface pins 2.2.5 DISCH 2.2.6 GND 2.2.7 ATTACH 2.2.8 RP_3A/RP_1A5 2.2.9 GPIO 2.2.10 VBUS_EN_SNK 2.2.11 A_B_SIDE 2.2.12 VBUS_VS_DISCH 2.2.13 VREG_1V2 2.2.14 VSYS 2.2.15 VREG_2V7 2.2.16 VDD 3 Description of the features 3.1 CC interface 3.2 VBUS power path control 3.2.1 VBUS monitoring 3.2.2 VBUS discharge 3.2.3 VBUS power path assertion 3.3 Dead battery mode 3.4 High voltage protections 3.5 Hardware fault management 3.6 Debug accessory mode detection 4 I²C Interface 4.1 Read and write operations 4.2 Timing specifications 5 Start-up configuration 5.1 User-defined parameters 5.2 Default start-up configuration 6 Application 6.1 General information 6.1.1 Power supplies 6.1.2 Connection to MCU or application processor 6.2 Typical application 7 Electrical characteristics 7.1 Absolute maximum ratings 7.2 Operating conditions 7.3 Electrical and timing characteristics 8 Package information 8.1 QFN-24 EP (4x4) package information 8.2 WLCSP (2.6x2.6x0.5) 25 bumps package information 8.3 Thermal information 9 Terms and abbreviations Revision history
STUSB4500L Description of the features 3 Description of the features 3.1 CC interface
The STUSB4500L controls the connection to the configuration channel (CC) pins, CC1 and CC2, through two main blocks: the CC line interface block and the CC control logic block. The CC line interface block is used to: • Set pull-down termination mode on the CC pins • Monitor the CC pin voltage values related to the attachment detection thresholds • Protect the CC pins against overvoltage The CC control logic block is used to: • Execute the Type-C FSM related to the sink power role with debug accessory support • Determine the electrical state for each CC pin related to the detected thresholds • Evaluate the conditions related to the CC pin states and the VBUS voltage value to transition from one state to another in the Type-C FSM • Advertise a valid source-to-sink connection • Determine the identity of the attached device: source or debug accessory • Determine cable orientation to allow external routing of the USB data • Manage USB Type-C power capability on VBUS: USB default, medium or high current mode • Handle hardware faults
3.2 VBUS power path control 3.2.1 VBUS monitoring
The VBUS monitoring block supervises from the VBUS_VS_DISCH input pin the VBUS voltage on the USB Type-C receptacle side. It is used to check that VBUS is within a valid voltage range to establish a valid source-to-sink connection and to enable safely the VBUS power path through the VBUS_EN_SNK pin. It allows detection of unexpected VBUS voltage conditions such as undervoltage or overvoltage related to the valid VBUS voltage range. When such conditions occur, the STUSB4500L reacts as follows: • At attachment, it prevents the source-to-sink connection to be established and the VBUS power path to be asserted • After attachment, it goes into unattached state and it disables the VBUS power path The valid VBUS voltage range is defined by a low limit VTHUSB and a high limit VMONUSBH (overvoltage condition): • VTHUSB low limit is fixed by hardware at 3.3 V in order to detect a VBUS rising edge (connection) or falling edge (disconnection) • The minimum value of VMONUSBH is VBUS +5% and can be shifted by fraction of 1% from VBUS+5% to VBUS +20%. The value is preset by default in the NVM (see Section 7.3 Electrical and timing characteristics) and can be changed independently through NVM programming (see Section 5 Start-up configuration)
3.2.2 VBUS discharge
The monitoring block also handles the VBUS discharge paths connected to the VBUS_VS_DISCH pin for the USB Type-C receptacle side and to the DISCH pin for the power system side. The discharge paths are activated at the same time when disconnection is detected or when the device goes into the error recovery state (see Section 3.5 Hardware fault management ). At detachment, during error recovery state, the discharge is activated for TDISUSB0V time.
DS13102
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Rev 2 page 9/32
Document Outline Cover image Product status link / summary Product status link / summary Features Applications Description 1 Functional description 1.1 Block overview 2 Inputs/outputs 2.1 Pinout 2.2 Pin description 2.2.1 CC1 / CC2 2.2.2 CC1DB / CC2DB 2.2.3 RESET 2.2.4 I²C interface pins 2.2.5 DISCH 2.2.6 GND 2.2.7 ATTACH 2.2.8 RP_3A/RP_1A5 2.2.9 GPIO 2.2.10 VBUS_EN_SNK 2.2.11 A_B_SIDE 2.2.12 VBUS_VS_DISCH 2.2.13 VREG_1V2 2.2.14 VSYS 2.2.15 VREG_2V7 2.2.16 VDD 3 Description of the features 3.1 CC interface 3.2 VBUS power path control 3.2.1 VBUS monitoring 3.2.2 VBUS discharge 3.2.3 VBUS power path assertion 3.3 Dead battery mode 3.4 High voltage protections 3.5 Hardware fault management 3.6 Debug accessory mode detection 4 I²C Interface 4.1 Read and write operations 4.2 Timing specifications 5 Start-up configuration 5.1 User-defined parameters 5.2 Default start-up configuration 6 Application 6.1 General information 6.1.1 Power supplies 6.1.2 Connection to MCU or application processor 6.2 Typical application 7 Electrical characteristics 7.1 Absolute maximum ratings 7.2 Operating conditions 7.3 Electrical and timing characteristics 8 Package information 8.1 QFN-24 EP (4x4) package information 8.2 WLCSP (2.6x2.6x0.5) 25 bumps package information 8.3 Thermal information 9 Terms and abbreviations Revision history