Datasheet PI6CG33801C (Diodes)
| Fabricante | Diodes |
| Descripción | 3.3V Very Low Power 8-Output PCIe Clock Generator With On-chip Termination |
| Páginas / Página | 24 / 1 — Lead-free Green. PI6CG33801C. 3.3V Very Low Power 8-Output PCIe Clock … |
| Formato / tamaño de archivo | PDF / 1.7 Mb |
| Idioma del documento | Inglés |
Lead-free Green. PI6CG33801C. 3.3V Very Low Power 8-Output PCIe Clock Generator With On-chip Termination. Features. Description
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Diodes Incorporated
Lead-free Green PI6CG33801C 3.3V Very Low Power 8-Output PCIe Clock Generator With On-chip Termination Features Description
Î Î 3.3V Supply Voltage The PI6CG33801C is an 8-output very low power PCIe Gen1/Gen2/ Î Î Crystal/CMOS input: 25 MHz Gen3/ Gen4/ Gen 5 clock generator. It uses 25MHz crystal or CMOS Î Î 8 differential low power HCSL outputs with on-chip reference as an input to generate the 100MHz low power differ- termination ential HCSL outputs with on-chip terminations. The on-chip ter- Î Î Default ZOUT = 100Ω mination can save 32 external resistors and make layout easier. An additional buffered reference output is provided to serve as a Î Î Individual output enable low noise reference for other circuitry. Î Î Reference CMOS output Î Î Programmable slew rate and output amplitude for each output It uses Diodes' proprietary PLL design to achieve very low Î Î Differential outputs blocked until PLL is locked jitter that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen 5 require- Î Î Selectable 0%, -0.25% or -0.5% spread on differential outputs ments. It also provides various options such as different slew rate Î Î Strapping pins or SMBus for configuration and amplitude through SMBUS so that users can configure the device easily to get the optimized performance for their individ- Î Î Differential Output-To-Output Skew <60ps ual boards. The device also supports selectable spread-spectrum Î Î Very-Low Jitter Outputs options to reduce EMI for various applications. à Differential Cycle-To-Cycle Jitter <50ps à PCIe Gen1/Gen2/Gen3/Gen4/Gen5 Compliant à CMOS REFOUT Phase Jitter
Block Diagram
• < 0.3ps RMS, SSC off • <1.5ps RMS, SSC on REFOUT ÎÎTotally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) OE[7:0]# Q7 ÎÎHalogen and Antimony Free. “Green” Device (Note 3) ÎÎFor automotive applications requiring specific change control Q6 (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, XTAL_IN/CLK OSC PLL XTAL_OUT and manufactured in IATF 16949 certified facilities), please SS Q5 contact us or your local Diodes representative. SCLK Q4 https://www.diodes.com/quality/product-definitions/ SDATA SADR CTRL ÎÎPackaging (Pb-free & Green): 48-lead 6×6mm TQFN SS_SEL_TRI LOGIC Q3 PD# Q2 Q1 Q0
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. PI6CG33801C www.diodes.com January 2020 Document Number DS42297 Rev 3-2 1 Diodes Incorporated
b P
Diodes Incorporated
Lead-free Green PI6CG33801C 3.3V Very Low Power 8-Output PCIe Clock Generator With On-chip Termination Features Description
Î Î 3.3V Supply Voltage The PI6CG33801C is an 8-output very low power PCIe Gen1/Gen2/ Î Î Crystal/CMOS input: 25 MHz Gen3/ Gen4/ Gen 5 clock generator. It uses 25MHz crystal or CMOS Î Î 8 differential low power HCSL outputs with on-chip reference as an input to generate the 100MHz low power differ- termination ential HCSL outputs with on-chip terminations. The on-chip ter- Î Î Default ZOUT = 100Ω mination can save 32 external resistors and make layout easier. An additional buffered reference output is provided to serve as a Î Î Individual output enable low noise reference for other circuitry. Î Î Reference CMOS output Î Î Programmable slew rate and output amplitude for each output It uses Diodes' proprietary PLL design to achieve very low Î Î Differential outputs blocked until PLL is locked jitter that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen 5 require- Î Î Selectable 0%, -0.25% or -0.5% spread on differential outputs ments. It also provides various options such as different slew rate Î Î Strapping pins or SMBus for configuration and amplitude through SMBUS so that users can configure the device easily to get the optimized performance for their individ- Î Î Differential Output-To-Output Skew <60ps ual boards. The device also supports selectable spread-spectrum Î Î Very-Low Jitter Outputs options to reduce EMI for various applications. à Differential Cycle-To-Cycle Jitter <50ps à PCIe Gen1/Gen2/Gen3/Gen4/Gen5 Compliant à CMOS REFOUT Phase Jitter
Block Diagram
• < 0.3ps RMS, SSC off • <1.5ps RMS, SSC on REFOUT ÎÎTotally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) OE[7:0]# Q7 ÎÎHalogen and Antimony Free. “Green” Device (Note 3) ÎÎFor automotive applications requiring specific change control Q6 (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, XTAL_IN/CLK OSC PLL XTAL_OUT and manufactured in IATF 16949 certified facilities), please SS Q5 contact us or your local Diodes representative. SCLK Q4 https://www.diodes.com/quality/product-definitions/ SDATA SADR CTRL ÎÎPackaging (Pb-free & Green): 48-lead 6×6mm TQFN SS_SEL_TRI LOGIC Q3 PD# Q2 Q1 Q0
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. PI6CG33801C www.diodes.com January 2020 Document Number DS42297 Rev 3-2 1 Diodes Incorporated