Datasheet AD1937 (Analog Devices)

Four ADCs/Eight DACs with PLL, 192 kHz, 24-Bit Codec AD1937 FEATURES GENERAL DESCRIPTION PLL-generated clock or direct master clock
The AD1937 is a high performance, single-chip codec that provides
Low EMI design
four analog-to-digital converters (ADCs) with differential input
112 dB DAC/107 dB ADC dynamic range and SNR
and eight digital-to-analog converters (DACs) with differential
−96 dB THD + N
output, using the Analog Devices, Inc., patented multibit sigma-
Single 3.3 V supply
delta (Σ-Δ) architecture. An I2C® port is included, allowing a
Tolerance for 5 V logic inputs
microcontroller to adjust volume and many other parameters.
Supports 24-bits and 8 kHz to 192 kHz sample rates
The AD1937 operates from 3.3 V digital and analog supplies.
Differential ADC input
The AD1937 is available in a 64-lead (differential output) LQFP.
Differential DAC output
The AD1937 is designed for low EMI. This consideration is
Log volume control with autoramp function
apparent in both the system and circuit design architectures.
I2C-controllable for flexibility
By using the on-board PLL to derive the master clock from the
Software-controllable clickless mute
LR (frame) clock or from an external crystal, the AD1937 elimi-
Software power-down
nates the need for a separate high frequency master clock and
Right-justified, left-justified, I2S, and TDM modes
can also be used with a suppressed bit clock. The DACs and
Master and slave modes up to 16-channel input/output
ADCs are designed using the latest Analog Devices continuous
Available in a 64-lead LQFP
time architecture to further minimize EMI. By using 3.3 V
Qualified for automotive applications
supplies, power consumption is minimized and further reduces emissions.
APPLICATIONS Automotive audio systems Home theater systems Set-top boxes Digital audio effects processors FUNCTIONAL BLOCK DIAGRAM DIGITAL AUDIO INPUT/OUTPUT AD1937 SERIAL DATA PORT DAC DAC ADC SDATA SDATA DAC OUT IN DIGITAL ANALOG ADC DIGITAL CLOCKS FILTER DAC ANALOG AUDIO FILTER AND AUDIO INPUTS ADC VOLUME OUTPUTS DAC TIMING MANAGEMENT CONTROL AND CONTROL ADC DAC (CLOCK AND PLL) DAC DAC I2C PRECISION CONTROL PORT VOLTAGE REFERENCE
1
CONTROL DATA
00 4-
INPUT/OUTPUT
41 07 Figure 1.
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TEST CONDITIONS ANALOG PERFORMANCE SPECIFICATIONS CRYSTAL OSCILLATOR SPECIFICATIONS DIGITAL SPECIFICATIONS POWER SUPPLY SPECIFICATIONS DIGITAL FILTERS TIMING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG-TO-DIGITAL CONVERTERS (ADCs) DIGITAL-TO-ANALOG CONVERTERS (DACs) CLOCK SIGNALS RESET AND POWER-DOWN I2C CONTROL PORT POWER SUPPLY AND VOLTAGE REFERENCE SERIAL DATA PORTS—DATA FORMAT TIME-DIVISION MULTIPLEXED (TDM) MODES DAISY-CHAIN MODE ADDITIONAL MODES CONTROL REGISTERS DEFINITIONS PLL AND CLOCK CONTROL REGISTERS DAC CONTROL REGISTERS ADC CONTROL REGISTERS APPLICATIONS CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS