Datasheet BridgeSwitch Family (Power Integrations) - 8

BridgeSwitch
INL 50% 50% INL 50% /INH tDHL LS GATE (ON) 50% /INH 50% DRIVE (OFF) tDLH (ON) tDHL HS GATE LS GATE (ON) (OFF) 50% DRIVE DRIVE (OFF) 50% tDLH (ON) HS GATE 50% DRIVE (OFF) a) b) PI-8299-091917 Figure 11. Adaptive Dead Time a) INL and /INH Inputs Tied Together b) INL and /INH Inputs Separate.
Device Internal High-Side Status Update
1.3 The BridgeSwitch high-side control er provides status updates to the
FREDFET
low-side control er. The status update communicates triggered device
Switching Disabled
level protection such as high-side power FREDFET over current or 1.2 -8300b-051519 PI low-side power FREDFET over-temperature warning or shutdown. It also includes detected device faults such as XH pin short or open circuit 1.1 and loss of high-side power supply. The high-side control er provides
EF) D
the internal status update every time the low-side power FREDFET turns on. For correct internal status updates, the system micro-control er has 1.0 to set the INL control input high for at least t (see Figure 24 for INLH(COM) details). INL input turn-on control signals shorter than t may INHL(COM) 0.9
ed to I LIM(
cause incomplete internal status updates fol owed by the device
Maximum
reporting a “HS Driver not ready” status update (see Table 4).
aliz
0.8
Adjustable Cycle-by-Cycle Current Limit rm
BridgeSwitch devices feature cycle-by-cycle current limit protection
No
for both, the low-side and the high-side power FREDFET. As soon as 0.7
it Typical
the power FREDFET current exceeds the respective current limit level threshold after the leading edge blanking timer t expires, the
t Lim Recommended
LEB 0.6
n Operating Range
device turns off the power FREDFET. The FREDFET stays off until a turn-off edge fol owed by a turn-on edge is received at the respective
rre u
INL or /INH control input. The device will also report the respective 0.5
C
over-current fault through the STATUS COMMUNICATION pin (see Table 4 for details). 0.4
Minimum
The actual current limit level is programmed through the external smal signal resistor R or R (see Figure 1) connected to either the 0.3 XL XH EXTERNAL CURRENT LIMIT LOW-SIDE pin or to the EXTERNAL 20 30 40 50 60 70 80 90 100 110 120 130 140 150 CURRENT LIMIT HIGH-SIDE pin. Figure 12 shows the relationship
XL/XH Pin Resistor (k
Ω
)
between the resistor connected to XL pin or XH pin and the pro- Figure 12. Cycle-by-Cycle Current Limit Level Programming Through grammed normalized current limit level normalized to the default EXTERNAL CURRENT LIMIT Pin. current limit level I . LIM(DEF) The recommended operating range for the actual set current limit A detected short-circuit at the XL pin will eventual y cause the HS level is 42% to 100% of I and a resistance range for R or R FREDFET switching to cease as wel because the BPH pin capacitor is LIM(DEF) XL XH of 44.2 kΩ to 133 kΩ. only re-charged when the LS FREDFET turns on. The normalized current limit level continues to fal below 42% down to 0% of I for FREDFET switching is disabled for R or R values smal er than 35 kΩ LIM(DEF) XL XH R or R values greater than 133 kΩ. This provides protection against and the device reports either a LS driver not ready or a HS driver not XL XH possible XL pin or XH pin open circuit faults where the effective current ready status update through the FAULT pin (refer to Table 4). This limit threshold is 0. However, below 42% the specified current limit prevents inverter malfunction in case the programming resistor is level tolerance is not guaranteed. accidental y short-circuited. The device continues to accept LS FREDFET turn-on signals in case it detects a short-circuit at the XH pin. Adding capacitors to the XL pin or XH pin is not recommended.
8
Rev. I 01/20 www.power.com Document Outline Product Highlights Description Output Power Table Pin Functional Description BridgeSwitch Functional Description Application Example PCB Design Guidelines Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics Typical Performance Characteristics inSOP-24C Package Drawing Package Marking Part Ordering and MSL Table ESD and Latch-Up Table Part Ordering Information