VCNL36821S www.vishay.com Vishay Semiconductors BLOCK DIAGRAM V Anode DD Pin 6 Pin 5 PS timing controller PS buffer DSP IRED PD Oscillator IRED driver Temperature compensation INT Pin 2 SCL I2C bus logic Pin 8 control SDA Pin 7 Pin 1 Pin 3 Pin 4 (n.c.) (n.c.) GND Rev. 1.1, 29-Jan-2020 3 Document Number: 80150 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000