IR 8A OptiMOS™ IPOL16 A single-voltage synchronous Buck regulatorElectrical specifications6Electrical specificationsTable 4Recommended operating conditions for reliable operation with margin Input Voltage Range, PVin (Note 4) 1 V to 17 V Input Voltage Range, Vin (Note 5) 5 V to 17 V Supply Voltage Range, Vcc (Note 6) 4.5 V to 6.5 V Supply Voltage Range, Boot to SW 4.5 V to 6.5 V Output Voltage Range 0.6 V to 0.86 x PVin Output Current Range 0 to 16 A 300 kHz to 1500 kHz V Vin V Switching Frequency (Note 5, Note 6) 700 kHz to kHz . V Vin < V Operating Junction Temperature -40 °C to 125 °C Note: 4 Maximum absolute SW node voltage should not exceed 25 V. A common practice is to have 20% margin on the maximum SW node voltage in the design. For applications requiring PVin equal to or above 14 V, a small resistor in series with the Boot pin should be used to ensure the maximum SW node spike voltage does not exceed 20 V. Alternatively, a snubber can be used at the SW node to reduce the SW node spike. Note: 5 For internally biased single rail operation. When Vin drops below 6 V, the internal LDO may enter dropout mode, resulting in lower LDO voltage and lower Over Current limits. Please note that in dropout mode, the LDO voltage must be above the Vcc UVLO threshold to ensure the proper operation. Note: 6 Vcc/LDO_out can be connected to an external regulated supply. If so, the Vin input should be connected to Vcc/LDO_out pin to bypass the internal LDO. Final Datasheet 9 of 53 V2.2 June 28, 2019 Document Outline Revision History Trademarks Disclaimer