Datasheet TPS7A02 (Texas Instruments) - 5

TPS7A02 www.ti.com
SBVS277 – JULY 2019
6 Specifications 6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VIN –0.3 6.5 Voltage V V EN –0.3 6.5 VOUT –0.3 VIN + 0.3 or 5.5(2) Current Maximum output Internally limited A Operating junction, TJ –40 150 Temperature °C Storage, Tstg –65 150 (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Maximum is VIN + 0.3 V or 5.5 V, whichever is smaller.
6.2 ESD Ratings VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1000 V(ESD) Electrostatic discharge V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500 (1) JEDEC document JEP155 states that 500-V HBM allows safemanufacturing with a standard ESD control process.
TION
(2) JEDEC document JEP157 states that 250-V CDM allows safemanufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIN Input voltage 1.5 6.0 V VEN Enable voltage 0 VIN V VOUT Output voltage 0.8 5.0 V IOUT Output current 0 200 mA CIN Input capacitor 1 µF COUT Output capacitor(1) 1 1 22 µF
ANCEINFORMA
FEN EN toggle frequency 10 kHz TJ Operating junction temperature –40 125 °C (1) Effective output capacitance of 0.5 µF minimum required for stability.
ADV 6.4 Thermal Information TPS7A02 THERMAL METRIC(1) DQN (X2SON) DBV (SOT23-5) YFF (DSBGA) UNIT 4 PINS 5 PINS 4 PINS
RθJA Junction-to-ambient thermal resistance 179.1 TBD TBD °C/W RθJC(top) Junction-to-case(top) thermal resistance 137.6 TBD TBD °C/W RθJB Junction-to-board thermal resistance 116.3 TBD TBD °C/W ψJT Junction-to-top characterization parameter 6.1 TBD TBD °C/W ψJB Junction-to-board characterization parameter 116.3 TBD TBD °C/W RθJC(bot) Junction-to-case(bottom) thermal resistance 112.3 TBD TBD °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Copyright © 2019, Texas Instruments Incorporated Submit Documentation Feedback 5 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Switching Characteristics 6.7 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Excellent Transient Response 7.3.2 Active Discharge (P-Version Only) 7.3.3 Low IQ in Dropout 7.3.4 Smart Enable 7.3.5 Dropout Voltage 7.3.6 Foldback Current Limit 7.3.7 Undervoltage Lockout (UVLO) 7.3.8 Thermal Shutdown 7.4 Device Functional Modes 7.4.1 Device Functional Mode Comparison 7.4.2 Normal Operation 7.4.3 Dropout Operation 7.4.4 Disabled 8 Application and Implementation 8.1 Application Information 8.1.1 Recommended Capacitor Types 8.1.2 Input and Output Capacitor Requirements 8.1.3 Load Transient Response 8.1.4 Undervoltage Lockout (UVLO) Operation 8.1.5 Power Dissipation (PD) 8.1.5.1 Estimating Junction Temperature 8.1.5.2 Recommended Area for Continuous Operation 8.2 Typical Application 8.2.1 Design Requirements 8.2.2 Detailed Design Procedure 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Examples 11 Device and Documentation Support 11.1 Device Support 11.1.1 Device Nomenclature 11.2 Receiving Notification of Documentation Updates 11.3 Community Resources 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Mechanical, Packaging, and Orderable Information