Datasheet AD8305 (Analog Devices)

100 dB Range (10 nA to 1 mA) Logarithmic Converter Data Sheet AD8305 FEATURES FUNCTIONAL BLOCK DIAGRAM Optimized for fiber optic photodiode interfacing V I P PD 0.20 log10 1nA Measures current over 5 decades VPOS VRDZ Law conformance 0.1 dB from 10 nA to 1 mA VOUT Single- or dual-supply operation (3 V to 12 V total) VREF 80kΩ BIAS Full log-ratio capabilities 2.5V GENERATOR 200kΩ 20kΩ Nominal slope of 10 mV/dB (200 mV/decade) COMM 0.5V Nominal intercept of 1 nA (set by external resistor) IREF SCAL VBE2 14.2kΩ Optional adjustment of slope and intercept BFIN VBIAS I Q2 LOG 451Ω Complete and temperature stable – TEMPERATURE + COMPENSATION Q1 VLOG Rapid response time for a given current level IPD VBE1 Miniature 16-lead chip scale package 6.69kΩ INPT (LFCSP 3 mm × 3 mm) VSUM 0.5V COMM
001
Low power: ~5 mA quiescent current VNEG COMM
03053-
APPLICATIONS
Figure 1.
Optical power measurement Wide range baseband logarithmic compression Measurement of current and voltage ratios Optical absorbance measurement GENERAL DESCRIPTION
The AD83051 is an inexpensive microminiature logarithmic converter The logarithmic intercept (also known as the reference current) is optimized for determining optical power in fiber optic systems. It uses nominal y positioned at 1 nA by the use of the external y generated an advanced implementation of a classic translinear (junction based) current, IREF, of 10 µA, provided by a 200 kΩ resistor connected technique to provide a large dynamic range in a versatile and easily between VREF, at 2.5 V, and the reference input, IREF, at 0.5 V. The used form. A single-supply voltage of between 3 V and 12 V is intercept can be adjusted over a wide range by varying this resistor. adequate; dual supplies may optional y be used. The low quiescent The AD8305 can also operate in a log ratio mode, with the numerator current (typical y 5 mA) permits use in battery-operated applications. current applied to INPT and the denominator current applied to IREF. The input current, IPD, of 10 nA to 1 mA applied to the INPT pin is the A buffer amplifier is provided for driving a substantial load, for use in col ector current of an optimal y scaled NPN transistor, which converts raising the basic slope of 10 mV/dB to higher values, as a precision this current to a voltage (VBE) with a precise logarithmic relationship. A comparator (threshold detector), or in implementing low-pass filters. second such converter is used to handle the reference current (IREF) Its rail-to-rail output stage can swing to within 100 mV of the positive applied to pin IREF. These input nodes are biased slightly above ground and negative supply rails, and its peak current sourcing capacity is (0.5 V). This is generally acceptable for photodiode applications where 25 mA. the anode does not need to be grounded. Similarly, this bias voltage is easily accounted for in generating I It is a fundamental aspect of translinear logarithmic converters that the REF. The output of the logarithmic front end is available at Pin VLOG. small signal bandwidth falls as the current level diminishes, and the low frequency noise-spectral density increases. At the 10 nA level, the The basic logarithmic slope at this output is nominal y 200 mV/decade bandwidth of the AD8305 is about 50 kHz and increases in proportion (10 mV/dB). Thus, a 100 dB range corresponds to an output change of to IPD up to a maximum value of about 15 MHz. Using the buffer 1 V. When this voltage (or the buffer output) is applied to an ADC that amplifier, the increase in noise level at low currents can be addressed by permits an external reference voltage to be employed, the AD8305 using it to realize low-pass filters of up to three poles. voltage reference output of 2.5 V at Pin VREF can be used to improve the scaling accuracy. Suitable ADCs include the AD7810 (serial 10-bit), The AD8305 is available in a 16-lead LFCSP package and is specified AD7823 (serial 8-bit), and AD7813 (parallel, 8-bit or 10-bit). Other for operation from −40°C to +85°C. values of the logarithmic slope can be provided using a simple external resistor network. 1 Protected by U.S. Patent No. 5,519,308.
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Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics General Structure Theory Managing Intercept and Slope Response Time and Noise Considerations Power Supply Sequencing Applications Information Calibration Using a Negative Supply Log-Ratio Applications Reversing The Input Polarity Characterization Methods Evaluation Board Outline Dimensions Ordering Guide