Datasheet LTC7150S, LTC7150S-4 (Analog Devices) - 8

LTC7150S/LTC7150S-4
PIN FUNCTIONS PHMODE (Pin A1):
Control Input to Phase Selector.
MODE/SYNC (Pin B3):
Discontinuous Mode Select Determines the phase relationship between internal and Oscillator Synchronization Pin. Tie MODE/SYNC oscillator and CLKOUT. Tie it to INTVCC for 2-phase to GND for discontinuous mode of operation. Floating operation, tie it to SGND for 3-phase operation, and tie it MODE/SYNC or tying it to a voltage above 1V will select to INTVCC/2 (or float the pin) for 4-phase operation. forced continuous mode. Furthermore, connecting MODE/
PGOOD (Pin A2):
Output Power Good with Open-Drain SYNC to an external clock will synchronize the system Logic. PGOOD is pulled to ground when the voltage of the clock to the external clock and puts the part in forced FB pin is not within ±8% of the internal 0.6V reference. continuous mode.
RT (Pin A3):
Switching Frequency Programming Pin.
TRACK/SS (Pin B4):
Output Tracking and Soft-Start Pin. Connect an external resistor (between 405k to 54k) from Allows the user to control the rise time of the output this pin to GND to program the frequency from 400kHz voltage. Putting a voltage between 0.6V on this pin relative – to 3MHz. to VOUT bypasses the internal reference input to the error amplifier, instead it servos the FB pin relative to V – OUT to
ITH (Pin A4):
Error Amplifier Output and Switching that voltage. There’s an internal 5µA pull-up current from Regulator Compensation Point. The current comparator’s INTVCC to this pin, so putting a capacitor from this pin to trip threshold is linearly proportional to this voltage, V – OUT provides a soft-start function. whose normal range is from 0.3V to 1.8V.
SGND (Pin B5):
Signal GND.
FB (Pin A5):
Feedback Input to the Error Amplifier of the Step-Down Regulator. Connect resistor divider tap to this
INTVCC (Pin B6):
Internal 3.3V Regulator Output. The pin. The output voltage can be adjusted from 0.6V to V internal power drivers and control circuits are powered IN by: V from this voltage. Decouple this pin to power ground with OUT = 0.6V • [1 + (R1/R2)]. a minimum of 4.7µF low ESR ceramic capacitor.
V – OUT (Pin A6):
Negative Return of Output Rail. Connect this pin directly to the bottom of the remote output
SVIN (Pin C1):
Signal VIN. Filtered input voltage to the capacitor near the load in order to minimize error incurred on-chip 3.3V regulator. Bypass signal into the SVIN pin by voltage drop across the metal trace of the board. with a 0.1µF ceramic capacitor.
CLKOUT (Pin B1):
Output Clock Signal for PolyPhase
PVIN (Pins C2, C5, C6, D1, D2, D5, D6):
Power VIN. Input Operation. The phase of CLKOUT with respect to CLKIN voltage to the on chip power MOSFETs. is determined by the state of the PHMODE pin. CLKOUT’s
SW (Pins C3, C4, D3, D4, E3, E4, F3, F4, G3, G4):
peak-to-peak amplitude is INTVCC to GND. Switch Node Connection of External Inductor. Voltage
RUN (Pin B2):
Logic Controlled RUN Input. Do not leave this swing of SW is from a diode voltage drop below ground pin floating. Logic High activates the step-down regulator. to a diode voltage above PVIN.
PGND (Pins E1, E2, E5, E6, F1, F2, F5, F6, G1, G2, G5, G6):
Ground for Power and Signal Ground. Rev. B 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Typical Applications Package Photo Revision History Typical Application Related Parts