link to page 10 link to page 4 LTC7151S OPERATION Output Voltage Programming The internal PLL has a synchronization range of ±30% The output voltage is set by an external resistive divider around its programmed frequency. Therefore, during exter- according to the following equation: nal clock synchronization be sure that the external clock frequency is within this ±30% range of the RT programmed ⎛ R ⎞ frequency. See plot of switching frequency vs R V FB1 T value in OUT = 0.5V • ⎜1+ ⎟ ⎝ R ⎠ the Typical Performance Characteristics section. FB2 The resistive divider allows the V Output Voltage Tracking and Soft-Start FB pin to sense a frac- tion of the output voltage as shown in Figure 1. Since the The LTC7151S allows the user to program its output volt- LTC7151S will often be used in high power applications, age ramp rate by means of the TRACK/SS pin. An internal there can be significant voltage drop due to board lay- 6µA current pulls up the TRACK/SS pin to INTVCC. Putting out between the part and the point-of-load (POL). Thus, an external capacitor on TRACK/SS enables soft starting it is imperative to have RFB2 and RFB1 Kelvin directly to the output to prevent current surge on the input sup- the positive and negative terminals of the point-of-load. ply. For output tracking applications, TRACK/SS can be The negative terminal should then be connected directly externally driven by another voltage source. From 0V to to the V – OUT pin of the LTC7151S for differential VOUT 0.5V, the TRACK/SS voltage will override the internal 0.5V sensing. A feed forward compensation capacitor, CFF, can reference input to the error amplifier, thus regulating the also be placed between VOUT and FB to improve transient feedback voltage to that of the TRACK/SS pin. During this performance. start-up time, the LTC7151S will operate in discontinuous mode. When TRACK/SS is above 0.5V, tracking is dis- VOUT abled and the feedback voltage will regulate to the internal reference voltage. The relationship between output rise RFB1 CFF time and TRACK/SS capacitance is given by: FB LTC7151S R T FB2 SS = 83333 • CTRACK/SS V – OUT Multiphase Operation KELVIN TO POINT- 7151S F01 OF-LOAD GND For output loads that demand more than 15A of current, multiple LTC7151S can be paralleled to run out-of-phase Figure 1. Setting the Output Voltage Differentially to provide more output current. The MODE/SYNC pin allows the LTC7151S to synchronize to an external clock In applications where the POL is far from the IC, it is a – and the internal phase-locked-loop allows the LTC7151S good idea to place a 0.1µF capacitor from VOUT to GND to lock onto MODE/SYNC’s phase as well. The CLKOUT close to the IC to filter any noise that might be injected – signal can be connected to the MODE/SYNC pin of the onto the VOUT trace. following LTC7151S to line up both the frequency and the phase of the entire system. Tying the PHMODE pin Programming Switching Frequency to INTVCC, SGND or floating the pin generates a phase Connecting a resistor from the RT pin to SGND programs difference between the clock applied on the MODE/SYNC the switching frequency from 400kHz to 3MHz according pin and CLKOUT of 180° degrees, 120° degrees, or 90° to the following formula: degrees respectively, which corresponds to 2-phase, 3-phase, or 4-phase operation. A total of 12 phases can 1.67 • 1011 Frequency = be paralleled to run simultaneously out-of-phase with RT(Ω) respect to each other by programming the PHMODE pin of each LTC7151S to different voltage levels. Rev. 0 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Typical Applications Package Photo Typical Application Related Parts