Datasheet LT8361 (Analog Devices) - 9

link to page 7 LT8361
OPERATION
The LT8361 uses a fixed frequency, current mode control If the EN/UVLO pin voltage is below 1.6V, the LT8361 scheme to provide excellent line and load regulation. enters undervoltage lockout (UVLO), and stops switching. Operation can be best understood by referring to the When the EN/UVLO pin voltage is above 1.68V (typical), Block Diagram. An oscillator (with frequency programmed the LT8361 resumes switching. If the EN/UVLO pin voltage by a resistor at the RT pin) turns on the internal power is below 0.2V, the LT8361 draws less than 1µA from VIN. switch at the beginning of each clock cycle. Current in For the SYNC/MODE pin tied to ground or <0.14V, the the inductor then increases until the current comparator LT8361 will enter low output ripple Burst Mode opera- trips and turns off the power switch. The peak inductor tion for ultra low quiescent current during light loads to current at which the switch turns off is controlled by the maintain high efficiency. For a 100k resistor from SYNC/ voltage on the VC pin. The error amplifier servos the VC MODE pin to GND, the LT8361 uses Burst Mode opera- pin by comparing the voltage on the FBX pin with an tion for improved efficiency at light loads but seamlessly internal reference voltage (1.60V or –0.80V, depending transitions to Spread-Spectrum Modulation of switching on the chosen topology). When the load current increases frequency for low EMI at heavy loads. For the SYNC/ it causes a reduction in the FBX pin voltage relative to MODE pin floating (left open), the LT8361 uses pulse- the internal reference. This causes the error amplifier to skipping mode, at the expense of hundreds of microamps, increase the VC pin voltage until the new load current to maintain output voltage regulation at light loads by is satisfied. In this manner, the error amplifier sets the skipping switch pulses. For the SYNC/MODE pin tied to correct peak switch current level to keep the output in INTV regulation. CC or >1.7V, the LT8361 uses pulse-skipping mode and performs Spread-Spectrum Modulation of switching The LT8361 is capable of generating either a positive or frequency. For the SYNC/MODE pin driven by an external negative output voltage with a single FBX pin. It can be clock, the converter switching frequency is synchronized configured as a boost or SEPIC converter to generate a to that clock and pulse-skipping mode is also enabled. See positive output voltage, or as an inverting converter to the Pin Functions section for SYNC/MODE pin. generate a negative output voltage. When configured as The LT8361 includes a BIAS pin to improve efficiency a Boost converter, as shown in the Block Diagram, the across all loads. The LT8361 intelligently chooses between FBX pin is pulled up to the internal bias voltage of 1.60V the V by a voltage divider (R1 and R2) connected from V IN and BIAS pins to supply the INTVCC for best ef- OUT ficiency. The INTV to GND. Amplifier A2 becomes inactive and amplifier A1 CC supply current can be drawn from the BIAS pin instead of the V performs (inverting) amplification from FBX to V IN pin for 4.4V ≤ BIAS ≤ VIN. C. When the LT8361 is in an inverting configuration, the FBX pin Protection features ensure the immediate disable of is pulled down to –0.80V by a voltage divider from VOUT switching and reset of the SS pin for any of the following to GND. Amplifier A1 becomes inactive and amplifier A2 faults: internal reference UVLO, INTVCC UVLO, switch cur- performs (non-inverting) amplification from FBX to VC. rent > 1.5× maximum limit, EN/UVLO < 1.6V or junction temperature > 170°C. Rev 0 For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts