Datasheet ADP5072 (Analog Devices) - 3

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Data Sheet ADP5072 SPECIFICATIONS
PVIN = AVIN = 2.85 V to 5.5 V, positive output voltage (VPOS) = 15 V, negative output voltage (VNEG) = −15 V, fSW = 1200 kHz, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted.
Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
INPUT SUPPLY VOLTAGE RANGE VIN 2.85 5.5 V PVIN, AVIN QUIESCENT CURRENT Operating Quiescent Current PVIN, AVIN (Total) IQ 3.5 4.0 mA No switching, EN1 = EN2 = high, PVIN = AVIN = 5 V Standby Current ISTNDBY 2.05 2.2 mA No switching, EN1 = EN2 = low, PVIN = AVIN = 5 V UVLO System UVLO Threshold AVIN Rising VUVLO_RISING 2.8 2.85 V Falling VUVLO_FALLING 2.5 2.55 V Hysteresis VHYS 0.25 V OSCILLATOR CIRCUIT Switching Frequency fSW 1.130 1.2 1.270 MHz SYNC = low 2.240 2.4 2.560 MHz SYNC = high (connect to PVIN) SYNC Input Input Clock Range fSYNC 1.0 2.6 MHz Input Clock Minimum On Pulse Width tSYNC_MIN_ON 100 ns Input Clock Minimum Off Pulse Width tSYNC_MIN_OFF 100 ns Input Clock High Logic VH (SYNC) 1.3 V Input Clock Low Logic VL (SYNC) 0.4 V PRECISION ENABLING (EN1, EN2) High Level Threshold VTH_H 1.125 1.15 1.175 V Low Level Threshold VTH_L 1.025 1.05 1.075 V Shutdown Mode VTH_S 0.4 V Internal circuitry disabled to achieve ISTNDBY Pull-Down Resistance REN 1.48 MΩ BOOST REGULATOR Adjustable Positive Output Voltage VPOS 35 V Feedback Voltage VFB1 0.8 V Feedback Voltage Accuracy −0.5 +0.5 % TJ = 25°C −1.5 +1.5 % TJ = −40°C to +125°C Feedback Bias Current IFB1 0.1 µA Overvoltage Protection Threshold VOV1 0.86 V At FB1 pin Load Regulation (∆V 1 FB1/VFB1)/ΔILOAD1 0.0003 %/mA ILOAD1 = 5 mA to 150 mA Line Regulation (∆VFB1/VFB1)/ΔVPVIN 0.002 %/V VPVIN = 2.85 V to 5.5 V, ILOAD1 = 50 mA Error Amplifier (EA) Transconductance gM1 260 300 340 µA/V Power FET On Resistance RDS (ON) BOOST 175 mΩ Power FET Maximum Drain Source VDS (MAX) BOOST 39 V Voltage Current-Limit Threshold, Main Switch ILIM (BOOST) 1.0 1.1 1.3 A Minimum On Time 50 ns Minimum Off Time 25 ns Rev. 0 | Page 3 of 24 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION PWM MODE PSM MODE UNDERVOLTAGE LOCKOUT (UVLO) OSCILLATOR AND SYNCHRONIZATION INTERNAL REGULATOR PRECISION ENABLING SOFT START SLEW RATE CONTROL CURRENT-LIMIT PROTECTION OVERVOLTAGE PROTECTION THERMAL SHUTDOWN START-UP SEQUENCE APPLICATIONS INFORMATION COMPONENT SELECTION Feedback Resistors OUTPUT CAPACITORS Input Capacitor VREF Capacitor Soft Start Resistor Diodes Inductor Selection for the Boost Regulator Inductor Selection for the Inverting Regulator LOOP COMPENSATION Boost Regulator Inverting Regulator COMMON APPLICATIONS LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE