Datasheet InnoSwitch3-EP (Power Integrations) - 8

InnoSwitch3-EP
set by the V threshold and the set constant current is programmed detection of primary “ON” cycle when the FORWARD pin rings below PK by the resistor between the ISENSE and SECONDARY GROUND pins. ground. See Figure 8.
SR Disable Protection
In each cycle SR is only engaged if a set cycle was requested by the
Overload
secondary control er and the negative edge is detected on the Output overload response depends on whether the IS pin is shorted FORWARD pin. In the event that the voltage on the ISENSE pin to ground or the design includes a current sense resistor to set the exceeds approximately 3 times the CC threshold, the SR FET drive is overload threshold. disabled until the surge current has diminished to nominal levels. If there is an external current sense resistor on the IS pin, the
SR Static Pull-Down
InnoSwitch has options to set the overload response in two different To ensure that the SR gate is held low when the secondary is not in ways. control, the SYNCHRONOUS RECTIFIER DRIVE pin has a nominal y “ON” device to pull the pin low and reduce any voltage on the SR gate If the device is configured to have the FEEDBACK pin auto-restart due to capacitive coupling from the FORWARD pin. enabled, once the load current reaches the current limit threshold set by the IS pin resistor, the output voltage will fold back and auto-
Open SR Protection
restart will occur once the output voltage fal s below the AR threshold In order to protect against an open SYNCHRONOUS RECTIFIER for a time period exceeding the AR timer. DRIVE pin system fault the secondary control er has a protection mode to ensure the SYNCHRONOUS RECTIFIER DRIVE pin is If the device is configured for overload response, once the load connected to an external FET. If the external capacitance on the current exceeds the current sense threshold the output voltage does SYNCHRONOUS RECTIFIER DRIVE pin is below 100 pF, the device not fold back. The auto-restart timer will begin and auto-restart will assume the SYNCHRONOUS RECTIFIER DRIVE pin is “open” and occurs if the load current remains higher than the current sense there is no FET to drive. If the pin capacitance detected is above threshold for a time period exceeding the AR timer. 100 pF, the control er will assume an SR FET is connected. In the event the SYNCHRONOUS RECTIFIER DRIVE pin is detected to No CC with Overload Response be open, the secondary control er will stop requesting pulses from AR when Load > ISVTH for t > tIS(AR) the primary to initiate auto-restart. If the SYNCHRONOUS RECTIFIER DRIVE pin is tied to ground at start-up, the SR drive function is disabled and the open Constant Current when V SYNCHRONOUS RECTIFIER DRIVE pin protection mode is also FB(AR) is enabled disabled.
Intelligent Quasi-Resonant Mode Switching
AR when VFB In order to improve conversion efficiency and reduce switching < VFB(AR) for t(FBAR)
Output Voltage
losses, the InnoSwitch3-EP features a means to force switching when the voltage across the primary switch is near its minimum voltage when the converter operates in discontinuous conduction mode (DCM). This mode of operation is automatical y engaged in DCM and disabled
Load Current
once the converter moves to continuous-conduction mode (CCM). ISVTH Threshold Rather than detecting the magnetizing ring val ey on the primary- PI-8962-040819 side, the peak voltage of the FORWARD pin voltage as it rises above the output voltage level is used to gate secondary requests to initiate Figure 9. Current Sense Resistor in a Design. the switch “ON” cycle in the primary control er. The secondary control er detects when the control er enters in The two cases where a current sense resistor is included in the discontinuous-mode and opens secondary cycle request windows design are shown in the Figure 9 below. corresponding to minimum switching voltage across the primary power switch. If the IS pin is shorted to the GND pin, the overload response heavily depends on the operating conditions. If the device is configured to Quasi-Resonant (QR) mode is enabled for 20 ms after DCM is detected have feedback auto-restart enabled (V ), auto-restart will occur if or when ring amplitude (pk-pk) >2 V. Afterwards, QR switching is FB(AR) the output voltage droops below the auto-restart threshold for longer disabled, at which point switching may occur at any time a secondary than the auto-restart timer (t ). Otherwise, the auto-restart request is initiated. FB(AR) occurs if the primary switches above the overload frequency limit The secondary control er includes blanking of ~1 ms to prevent false (f ) for longer than the auto-restart on-time (t ). OVL AR
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Rev. G 07/19 www.power.com Document Outline Product Highlights Description Output Power Table Pin Functional Description InnoSwitch3-EP Functional Description Primary Controller Secondary Controller Applications Example Key Application Considerations Selection of Components Components for InnoSwitch3-EP Primary-Side Circuit Components for InnoSwitch3-EP Secondary-Side Circuit Recommendations for Circuit Board Layout Layout Example Quick Design Checklist Absolute Maximum Ratings Thermal Resistance Typical Performance Curves InSOP-24D Package Drawing InSOP-24D Package Marking Part Ordering Table MSL Table ESD and Latch-Up Table Part Ordering Information