Datasheet InnoSwitch3-CP (Power Integrations) - 8

InnoSwitch3-CP
current regulation is not required, the ISENSE pin must be tied to the If the SYNCHRONOUS RECTIFIER DRIVE pin is tied to ground at SECONDARY GROUND pin. The InnoSwitch3-CP has constant current start-up, the SR drive function is disabled and the open regulation below the V threshold, and a constant output power SYNCHRONOUS RECTIFIER DRIVE pin protection mode is also PK profile above the V threshold. The transition between CP and CC is disabled. PK set by the V threshold and the set constant current is programmed PK
Intelligent Quasi-Resonant Mode Switching
by the resistor between the ISENSE and SECONDARY GROUND pins. In order to improve conversion efficiency and reduce switching
SR Disable Protection
losses, the InnoSwitch3-CP features a means to force switching when In each cycle SR is only engaged if a set cycle was requested by the the voltage across the primary switch is near its minimum voltage secondary control er and the negative edge is detected on the when the converter operates in discontinuous conduction mode (DCM). FORWARD pin. In the event that the voltage on the ISENSE pin This mode of operation is automatical y engaged in DCM and disabled exceeds approximately 3 times the CC threshold, the SR FET drive is once the converter moves to continuous-conduction mode (CCM). disabled until the surge current has diminished to nominal levels. Rather than detecting the magnetizing ring val ey on the primary-
SR Static Pull-Down
side, the peak voltage of the FORWARD pin voltage as it rises above To ensure that the SR gate is held low when the secondary is not in the output voltage level is used to gate secondary requests to initiate control, the SYNCHRONOUS RECTIFIER DRIVE pin has a nominal y the switch “ON” cycle in the primary control er. “ON” device to pull the pin low and reduce any voltage on the SR gate due to capacitive coupling from the FORWARD pin. The secondary control er detects when the control er enters in discontinuous-mode and opens secondary cycle request windows
Open SR Protection
corresponding to minimum switching voltage across the primary In order to protect against an open SYNCHRONOUS RECTIFIER power switch. DRIVE pin system fault the secondary control er has a protection mode to ensure the SYNCHRONOUS RECTIFIER DRIVE pin is Quasi-Resonant (QR) mode is enabled for 20 ms after DCM is detected connected to an external FET. If the external capacitance on the or when ring amplitude (pk-pk) >2 V. Afterwards, QR switching is SYNCHRONOUS RECTIFIER DRIVE pin is below 100 pF, the device disabled, at which point switching may occur at any time a secondary will assume the SYNCHRONOUS RECTIFIER DRIVE pin is “open” and request is initiated. there is no FET to drive. If the pin capacitance detected is above The secondary control er includes blanking of ~1 100 pF, the control er will assume an SR FET is connected. ms to prevent false detection of primary “ON” cycle when the FORWARD pin rings below In the event the SYNCHRONOUS RECTIFIER DRIVE pin is detected to ground. See Figure 10. be open, the secondary control er will stop requesting pulses from the primary to initiate auto-restart.
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Rev. E 07/19 www.power.com Document Outline Product Highlights Description Output Power Table Pin Functional Description InnoSwitch3-CP Functional Description Primary Controller Secondary Controller Applications Example Key Application Considerations Selection of Components Recommendations for Circuit Board Layout Layout Example Quick Design Checklist Absolute Maximum Ratings Thermal Resistance Typical Performance Curves InSOP-24D Package Drawing InSOP-24D Package Marking Part Ordering Table MSL Table ESD and Latch-Up Table Part Ordering Information