link to page 16 link to page 16 link to page 16 link to page 17 link to page 17 Data SheetAD8260–200f = 10MHz–30HD2, VOUT = 1V p-p–20Bc)HD3, VOUT = 1V p-pd–40(HD2, VOUT = 2V p-pNRHD3, VLOAD = 50Ω, VOUT = 1V p-pOUT = 2V p-pIORLOAD = 50Ω, VOUT = 2V p-pT–50–40RRLOAD = 500Ω, VOUT = 1V p-pOBc)RTdLOAD = 500Ω, VOUT = 2V p-p–60IS DD3 (ICIM –60N–70O RM–80HA–80–90–100 09 –100 12 0102030405060708090100 0 0 2- 2M10M100M 2- LOAD CAPACITANCE (pF) 19 19 07 FREQUENCY (Hz) 07 Figure 9. Harmonic Distortion (HD2, HD3) vs. Load Capacitance at Two Figure 12. IMD3 vs. Frequency for Two Values of Output Voltage and Two Values of Output Voltage for the High Current Driver—See Figure 54 Values of Load Resistance for the High Current Driver—See Figure 55 050f = 10MHz–2040Bc) d N ( –40IO)30RTmOBTdS –603 (RLOAD = 50Ω, VOUT = 1V p-pC DIHD3HD2OIP20RLOAD = 50Ω, VOUT = 2V p-pNIRLOAD = 500Ω, VOUT = 1V p-pO –80RLOAD = 500Ω, VOUT = 2V p-pHARM10–100–120 0 000.51.01.52.02.53.0 -01 13 2M10M100M 02- OUTPUT VOLTAGE (V p-p) 192 19 07 FREQUENCY (Hz) 07 Figure 10. Harmonic Distortion (HD2, HD3) vs. Output Voltage for the High Figure 13. Third-Order Intercept (OIP3) vs. Frequency for the High Current Driver Current Driver—See Figure 54 See Figure 55 –2020RLOAD = 50Ω–30RLOAD = 500Ωc) B d–4015N ( IOHD2–50)RTmOBT2V p-pHD3dS–60( B 10 1dC DIIPNI–70O–805HARM1V p-p–90 14 0 –100 1 2- 1 0 0 1M10M100M 19 2- 1M10M100M 07 FREQUENCY (Hz) 19 FREQUENCY (Hz) 07 Figure 11. Harmonic Distortion (HD2, HD3) vs. Frequency of the High Current Figure 14. Input-Referred 1 dB Compression (IP1dB) vs. Frequency for Two Driver at Two Values of Output Voltage—See Figure 54 Values of Load Resistance for the High Current Driver Rev. B | Page 9 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION OVERVIEW HIGH CURRENT DRIVER AMPLIFIER PRECAUTIONS TO BE OBSERVED DURING HALF-DUPLEX OPERATION VMID BUFFER PREAMPLIFIER PREAMPLIFIER NOISE DGA GAIN CONTROL OUTPUT STAGE ATTENUATOR SINGLE-SUPPLY OPERATION AND AC COUPLING POWER-UP/POWER-DOWN SEQUENCE LOGIC INTERFACES APPLICATIONS INFORMATION EVALUATION BOARD CONNECTING THE EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE