AD8432Data Sheet20–40G = 24.08dBHD2, 10MHz18G = 21.58dBHD2, 1MHz)G = 18.06dB–50HD3, 10MHzG = 12.04dB16HD3, 1MHz√HzMEASUREMENTV/ nLIMIT14–60E (c)ISB12dO( –70N E10IONGT–80LTA8OROTVISTD6U–90P T4OU–10020–1100.010.1110100 2 5 22 00.51.01.52.02.53.03.54.04.5 22 1- 1- FREQUENCY (MHz) 34 V 34 08 OUT (V p-p) 08 Figure 21. Output Voltage Noise vs. Frequency Figure 24. Harmonic Distortion vs. Differential Output Voltage, G = 12.04 dB 0–40LOW TONE–10HIGH TONE–50–20–30–60c) B–40c)d (B–70d –50IONHD2, 10MHz3 (TDHD2, 1MHzIM–80–60ORHD3, 10MHzTHD3, 1MHzISMEASUREMENT–70D –90LIMIT–80–100–90–100–110110100 6 23 00.51.01.52.02.53.03.54.04.5 2 22 1- 1- FREQUENCY (MHz) 34 VOUT (V p-p) 34 08 08 Figure 22. IMD3 vs. Frequency Figure 25. Harmonic Distortion vs. Differential Output Voltage, G = 24.08 dB 50–50G = 24.08dBG = 12.04dB4540–6035c))B30dm(B d25–703 (TIONP OI20OR T IS D15–8010HD2, 10MHz, 2V p-p5HD2, 10MHz, 1V p-pHD3, 10MHz, 2V p-pHD3, 10MHz, 1V p-p0–90 27 110100 24 2 2 0510152025 1- 1- 834 FREQUENCY (MHz) 34 C 08 L (pF) 0 Figure 23. Output Third-Order Intercept vs. Frequency Figure 26. Harmonic Distortion at 10 MHz vs. Capacitive Load (CL), G = 12.04 dB Rev. D | Page 10 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION LOW NOISE AMPLIFIER (LNA) GAIN SETTING TECHNIQUE ACTIVE INPUT RESISTANCE MATCHING APPLICATIONS INFORMATION TYPICAL SETUP I/Q DEMODULATION FRONT END DIFFERENTIAL-TO-SINGLE-ENDED CONVERSION EVALUATION BOARD CONNECTION AND OPERATION Power Supply Input Termination Setting the Amplifier Gain Output SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE NOTES NOTES NOTES