Datasheet ADL5336 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | Cascadable IF VGAs with Programmable RMS Detectors |
| Páginas / Página | 30 / 7 — Data Sheet. ADL5336. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. PP1. … |
| Revisión | C |
| Formato / tamaño de archivo | PDF / 1.2 Mb |
| Idioma del documento | Inglés |
Data Sheet. ADL5336. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. PP1. PM1. VCM1 1. 24 VCM2. VPOS 2. 23 VPOS. INP1 3. 22 OPP2. INM1 4. 21 OPM2
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Data Sheet ADL5336 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS M M PP1 PM1 2A 2A 2B 2B CO O O PI MI CO PI MI 32 31 30 29 28 27 26 25 VCM1 1 24 VCM2 VPOS 2 23 VPOS INP1 3 22 OPP2 INM1 4 ADL5336 21 OPM2 VPOS 5 TOP VIEW 20 VPOS (Not to Scale) COM 6 19 COM MODE 7 18 SDO ENBL 8 17 DATA 9 10 11 12 13 14 15 16 D K N1 N2 M LE AI TO1 AI TO2 CL G D G D CO VPSD NOTES
004
1. EXPOSED PADDLE. CONNECT TO LOW IMPEDANCE GROUND PAD.
09550- Figure 4. Pin Configuration
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1, 24 VCM1, VCM2 Common-Mode Voltages. Decouple to common for ac-coupled operation. 2, 5, 14, 20, 23 VPOS, VPSD Analog and Digital Positive Supply Voltage (4.5 V to 5.5 V). 3, 4, 25, 26, 28, 29 INP1, INM1, IM2B, Differential Inputs. 200 Ω input impedance; ac coupling recommended. IP2B, IM2A, IP2A 6, 13, 19, 27, 32 COM, COMD Analog and Digital Common. Connect via lowest possible impedance to external circuit common. 7 MODE Gain Mode Control. Pull high for VGA mode, and pull low for AGC mode. 8 ENBL Chip Enable. Pull high to enable. 9, 11 GAIN1, GAIN2 Analog Gain Control (0 V to 1 V). 10, 12 DTO1, DTO2 Detector Outputs (0.1 V to VPOS/2 Range). 15, 16, 17, 18 LE, CLK, DATA, SDO SPI Programming and Data Readout Pins. CMOS levels VLOW < 1.8 V, VHIGH > 2.2 V. 21, 22, 30, 31 OPM2, OPP2, Differential Outputs. Low output impedance; ac coupling recommended. OPM1, OPP1 EPAD Exposed Paddle. Connect to low impedance ground pad. Rev. C | Page 7 of 30 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT DESCRIPTION GAIN CONTROL INTERFACE INPUT AND OUTPUT IMPEDANCES AGC OPERATION REGISTER MAP AND CODES APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DETECTOR OUTPUT AND GAIN PIN COMMON-MODE BYPASSING SERIAL PORT CONNECTIONS MODE AND ENABLE CONNECTIONS ERROR VECTOR MAGNITUDE (EVM) EFFECT OF CAGC ON EVM AGC INSENSITIVITY TO MODULATION TYPE EFFECT OF SETPOINT ON EVM CASCADED VGA/AGC PERFORMANCE EVALUATION BOARD LAYOUT BILL OF MATERIALS (BOM) EVALUATION BOARD CONTROL SOFTWARE OUTLINE DIMENSIONS ORDERING GUIDE
004
1. EXPOSED PADDLE. CONNECT TO LOW IMPEDANCE GROUND PAD.
09550- Figure 4. Pin Configuration
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1, 24 VCM1, VCM2 Common-Mode Voltages. Decouple to common for ac-coupled operation. 2, 5, 14, 20, 23 VPOS, VPSD Analog and Digital Positive Supply Voltage (4.5 V to 5.5 V). 3, 4, 25, 26, 28, 29 INP1, INM1, IM2B, Differential Inputs. 200 Ω input impedance; ac coupling recommended. IP2B, IM2A, IP2A 6, 13, 19, 27, 32 COM, COMD Analog and Digital Common. Connect via lowest possible impedance to external circuit common. 7 MODE Gain Mode Control. Pull high for VGA mode, and pull low for AGC mode. 8 ENBL Chip Enable. Pull high to enable. 9, 11 GAIN1, GAIN2 Analog Gain Control (0 V to 1 V). 10, 12 DTO1, DTO2 Detector Outputs (0.1 V to VPOS/2 Range). 15, 16, 17, 18 LE, CLK, DATA, SDO SPI Programming and Data Readout Pins. CMOS levels VLOW < 1.8 V, VHIGH > 2.2 V. 21, 22, 30, 31 OPM2, OPP2, Differential Outputs. Low output impedance; ac coupling recommended. OPM1, OPP1 EPAD Exposed Paddle. Connect to low impedance ground pad. Rev. C | Page 7 of 30 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT DESCRIPTION GAIN CONTROL INTERFACE INPUT AND OUTPUT IMPEDANCES AGC OPERATION REGISTER MAP AND CODES APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DETECTOR OUTPUT AND GAIN PIN COMMON-MODE BYPASSING SERIAL PORT CONNECTIONS MODE AND ENABLE CONNECTIONS ERROR VECTOR MAGNITUDE (EVM) EFFECT OF CAGC ON EVM AGC INSENSITIVITY TO MODULATION TYPE EFFECT OF SETPOINT ON EVM CASCADED VGA/AGC PERFORMANCE EVALUATION BOARD LAYOUT BILL OF MATERIALS (BOM) EVALUATION BOARD CONTROL SOFTWARE OUTLINE DIMENSIONS ORDERING GUIDE