Datasheet AD600, AD602 (Analog Devices) - 6

FabricanteAnalog Devices
DescripciónDual, Low Noise, Wideband Variable Gain Amplifier, -10 dB To +30 dB Gain
Páginas / Página32 / 6 — AD600/AD602. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. C1LO. 16 C1HI. …
RevisiónF
Formato / tamaño de archivoPDF / 475 Kb
Idioma del documentoInglés

AD600/AD602. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. C1LO. 16 C1HI. A1HI. A1CM. A1LO. A1OP. GAT1. 13 VPOS. REF. GAT2. 12 VNEG. A2LO. 11 A2OP

AD600/AD602 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS C1LO 16 C1HI A1HI A1CM A1LO A1OP GAT1 13 VPOS REF GAT2 12 VNEG A2LO 11 A2OP

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AD600/AD602 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS C1LO 1 16 C1HI A1HI 2 15 + A1CM A1 A1LO 3 14 A1OP GAT1 4 13 VPOS REF GAT2 5 12 VNEG A2LO 6 11 A2OP A2 A2HI 7 + 10 A2CM C2LO 8 9 C2HI
2
AD600 /
00 8-
AD602
53 00 Figure 2. Pin Configuration
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1 C1LO CH1 Gain-Control Input Low. Positive voltage reduces CH1 gain. 2 A1HI CH1 Signal Input High. Positive voltage increases CH1 output. 3 A1LO CH1 Signal Input Low. Usually connected to CH1 input ground. 4 GAT1 CH1 Gating Input. A logic high shuts off the CH1 signal path. 5 GAT2 CH2 Gating Input. A logic high shuts off the CH2 signal path. 6 A2LO CH2 Signal Input Low. Usually connected to CH2 input ground. 7 A2HI CH2 Signal Input High. Positive voltage increases CH2 output. 8 C2LO CH2 Gain-Control Input Low. Positive voltage reduces CH2 gain. 9 C2HI CH2 Gain-Control Input High. Positive voltage increases CH2 gain. 10 A2CM CH2 Common. Usually connected to CH2 output ground. 11 A2OP CH2 Output. 12 VNEG Negative Supply for Both Amplifiers. 13 VPOS Positive Supply for Both Amplifiers. 14 A1OP CH1 Output. 15 A1CM CH1 Common. Usually connected to CH1 output ground. 16 C1HI CH1 Gain-Control Input High. Positive voltage increases CH1 gain. Rev. F | Page 6 of 32 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION NOISE PERFORMANCE GAIN-CONTROL INTERFACE SIGNAL-GATING INPUTS COMMON-MODE REJECTION ACHIEVING 80 dB GAIN RANGE SEQUENTIAL MODE (MAXIMUM SNR) PARALLEL MODE (SIMPLEST GAIN-CONTROL INTERFACE) LOW RIPPLE MODE (MINIMUM GAIN ERROR) APPLICATIONS INFORMATION TIME-GAIN CONTROL (TGC) AND TIME-VARIABLE GAIN (TVG) INCREASING OUTPUT DRIVE DRIVING CAPACITIVE LOADS REALIZING OTHER GAIN RANGES ULTRALOW NOISE VCA LOW NOISE, 6 dB PREAMPLIFIER LOW NOISE AGC AMPLIFIER WITH 80 dB GAIN RANGE WIDE RANGE, RMS-LINEAR dB MEASUREMENT SYSTEM (2 MHz AGC AMPLIFIER WITH RMS DETECTOR) 100 dB TO 120 dB RMS RESPONDING CONSTANT BANDWIDTH AGC SYSTEMS WITH HIGH ACCURACY DECIBEL OUTPUTS 100 dB RMS/AGC SYSTEM WITH MINIMAL GAIN ERROR (PARALLEL GAIN WITH OFFSET) 120 dB RMS/AGC SYSTEM WITH OPTIMAL SNR (SEQUENTIAL GAIN) OUTLINE DIMENSIONS ORDERING GUIDE