Datasheet AD603 (Analog Devices) - 9

Data Sheet AD603 3.5V 21 TA = 25°C 10MHz RS = 50Ω 19 TEST SETUP FIGURE 23 17 INPUT GND 100mV/DIV ) 20MHz dB 15 ( E R 500mV 13 OUTPUT GND FIGU E 500mV/DIV 11 OIS N 9 7 –1.5V 5
021
–44ns 50ns 456ns
025
30 31 32 33 34 35 36 37 38 39 40
00539-
GAIN (dB)
00539- Figure 22. Transient Response, G = 20 dB Figure 25. Noise Figure in 0 dB/40 dB Mode (Input Is 500 ns Period, 50% Duty-Cycle Square Wave, Output Is Captured Using Tektronix 11402 Digitizing Oscilloscope)
0 TA = 25°C TEST SETUP FIGURE 23 0 –5 –10 –20 Bm) d –10 –30 ( L B) d –40 EVE L RR ( T –15 S P –50 PU IN –60 –20 –25
026
10 30 50 70
022
100k 1M 10M 100M INPUT FREQUENCY (MHz)
00539-
FREQUENCY (Hz)
00539- Figure 26. 1 dB Compression Point, −10 dB/+30 dB Mode, Gain = 30 dB Figure 23. PSRR vs. Frequency (Worst Case Is Negative Supply PSRR, Shown Here)
20 23 TA = 25°C TA = 25°C TEST SETUP FIGURE 23 R 21 S = 50V 70MHz TEST SETUP FIGURE 23 18 30MHz 19 16 ) 17 Bm) d 40MHz dB 50MHz ( ( L E E 15 R V 14 13 T LE FIGU U E 30MHz TP 12 OIS 11 70MHz OU N 10MHz 9 10 7 0
027
5 –20 –10 0
024
20 21 22 23 24 25 26 27 28 29 30 INPUT LEVEL (dBm)
00539-
GAIN (dB)
00539- Figure 27. Third-Order Intercept −10 dB/+30 dB Mode, Gain = 10 dB Figure 24. Noise Figure in −10 dB/+30 dB Mode Rev. K | Page 9 of 24 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Theory of Operation Noise Performance The Gain Control Interface Programming the Fixed-Gain Amplifier Using Pin Strapping Using the AD603 in Cascade Sequential Mode (Optimal SNR) Parallel Mode (Simplest Gain Control Interface) Low Gain Ripple Mode (Minimum Gain Error) Applications Information A Low Noise AGC Amplifier Caution Evaluation Board Outline Dimensions Ordering Guide