Datasheet AD9272 (Analog Devices) - 4

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AD9272 SPECIFICATIONS AC SPECIFICATIONS
AVDD1 = 1.8 V, AVDD2 = 3.0 V, DRVDD = 1.8 V, 1.0 V internal ADC reference, fIN = 5 MHz, RS = 50 Ω, LNA gain = 21.3 dB, LNA bias = high, PGA gain = 27 dB, GAIN− = 0.8 V, AAF LPF cutoff = fSAMPLE/4.5, HPF = LPF cutoff/20.7 (default), full temperature, ANSI-644 LVDS mode, unless otherwise noted.
Table 1. AD9272-40 AD9272-65 AD9272-80 Parameter1 Conditions Min Typ Max Min Typ Max Min Typ Max Unit
LNA CHARACTERISTICS Gain Single-ended 15.6/17.9/21.3 15.6/17.9/21.3 15.6/17.9/21.3 dB input to differential output Single-ended 9.6/11.9/15.3 9.6/11.9/15.3 9.6/11.9/15.3 dB input to single-ended output Input Voltage Range LNA gain = 733/550/367 733/550/367 733/550/367 mV p-p 15.6 dB/ SE2 17.9 dB/ 21.3 dB, LNA output limited to 4.4 V p-p differential output Input Common 0.9 0.9 0.9 V Mode Input Resistance RFB = 250 Ω 50 50 50 Ω RFB = 500 Ω 100 100 100 Ω RFB = ∞ 15 15 15 kΩ Input Capacitance LI-x 22 22 22 pF −3 dB Bandwidth 100 100 100 MHz Input-Referred LNA gain = 0.98/0.86/0.75 0.98/0.86/0.75 0.98/0.86/0.75 nV/√Hz Noise Voltage 15.6 dB/ 17.9 dB/ 21.3 dB, RS = 0 Ω, RFB = ∞ Input Noise Current RFB = ∞ 1 1 1 pA/√Hz 1 dB Input Com- LNA gain = 1.0/0.8/0.5 1.0/0.8/0.5 1.0/0.8/0.5 mV p-p pression Point 15.6 dB/ 17.9 dB/ 21.3 dB, GAIN+ = 0 V Noise Figure LNA gain = 15.6 dB/ 17.9 dB/ 21.3 dB Active Termination RS = 50 Ω, 4.8/4.1/3.2 4.8/4.1/3.2 4.8/4.0/3.2 dB Matched RFB = 200 Ω/ 250 Ω/350 Ω Unterminated RFB = ∞ 3.4/2.8/2.3 3.4/2.8/2.3 3.4/2.8/2.3 dB FULL-CHANNEL (TGC) CHARACTERISTICS AAF Low-Pass Filter −3 dB, 8 to 18 8 to 18 8 to 18 MHz Cutoff -In Range programmable AAF Low-Pass Filter −3 dB, 5 to 8 and 5 to 8 and 5 to 8 and MHz Cutoff - Out of programmable, 18 to 35 18 to 35 18 to 35 Range3 AAF Bandwidth Tolerance AAF Bandwidth ±10 ±10 ±10 % Tolerance -In Range Rev. C | Page 4 of 44 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY PRODUCT HIGHLIGHTS SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ADC Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL IMPEDANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ULTRASOUND CHANNEL OVERVIEW Low Noise Amplifier (LNA) Recommendation Active Impedance Matching LNA Noise INPUT OVERDRIVE Input Overload Protection CW DOPPLER OPERATION Crosspoint Switch TGC OPERATION Variable Gain Amplifier Gain Control VGA Noise Antialiasing Filter ADC CLOCK INPUT CONSIDERATIONS Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation and Power-Down Mode Digital Outputs and Timing SDIO Pin SCLK Pin CSB Pin RBIAS Pin Voltage Reference Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations SERIAL PORT INTERFACE (SPI) HARDWARE INTERFACE MEMORY MAP READING THE MEMORY MAP TABLE Caution RESERVED LOCATIONS DEFAULT VALUES LOGIC LEVELS OUTLINE DIMENSIONS ORDERING GUIDE