link to page 1 link to page 1 link to page 1 link to page 1 link to page 1 link to page 2 link to page 3 link to page 3 link to page 4 link to page 5 link to page 6 link to page 6 link to page 9 link to page 9 link to page 9 link to page 10 link to page 12 link to page 14 link to page 15 link to page 15 link to page 15 link to page 15 link to page 15 link to page 16 link to page 18 link to page 19 link to page 19 link to page 19 link to page 20 link to page 20 link to page 21 link to page 21 link to page 21 link to page 22 link to page 22 link to page 23 link to page 25 link to page 26 link to page 26 link to page 27 link to page 27 AD9286Data SheetTABLE OF CONTENTS Features .. 1 Voltage Reference ... 15 Applications ... 1 RBIAS ... 15 General Description ... 1 Clock Input Considerations .. 16 Product Highlights ... 1 Digital Outputs ... 18 Functional Block Diagram .. 1 Built-In Self-Test (BIST) and Output Test .. 19 Revision History ... 2 Built-In Self-Test (BIST) .. 19 Specifications ... 3 Output Test Modes ... 19 DC Specifications ... 3 Serial Port Interface (SPI) .. 20 AC Specifications .. 4 Configuration Using the SPI ... 20 Digital Specifications ... 5 Hardware Interface ... 21 Switching Specifications .. 6 Configuration Without the SPI .. 21 SPI Timing Specifications ... 6 SPI Accessible Features .. 21 Absolute Maximum Ratings .. 9 Memory Map .. 22 Thermal Resistance .. 9 Reading the Memory Map Register Table ... 22 ESD Caution .. 9 Memory Map Register Table ... 23 Pin Configuration and Function Descriptions ... 10 Memory Map Register Descriptions .. 25 Typical Performance Characteristics ... 12 Applications Information .. 26 Equivalent Circuits ... 14 Design Guidelines .. 26 Theory of Operation .. 15 Outline Dimensions ... 27 ADC Architecture .. 15 Ordering Guide .. 27 Analog Input Considerations .. 15 REVISION HISTORY 1/15—Rev. B to Rev. C Changes to Table 13 .. 24 6/13—Rev. A to Rev. B Changes to Clock Input Parameters, Table 4 .. 6 Changes to Clocking Modes Section ... 16 Changes to Table 9 .. 17 Changes to Register 0x09, Table 13 .. 23 3/11—Rev. 0 to Rev. A Changes to General Description, ADC Conversion Rate ... 1 1/11—Revision 0: Initial Version Rev. C | Page 2 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS SPI TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ADC ARCHITECTURE ANALOG INPUT CONSIDERATIONS Differential Input Configurations VOLTAGE REFERENCE RBIAS CLOCK INPUT CONSIDERATIONS Clock Input Options Clocking Modes Interleave Performance DIGITAL OUTPUTS Digital Output Enable Function () BUILT-IN SELF-TEST (BIST) AND OUTPUT TEST BUILT-IN SELF-TEST (BIST) OUTPUT TEST MODES SERIAL PORT INTERFACE (SPI) CONFIGURATION USING THE SPI HARDWARE INTERFACE CONFIGURATION WITHOUT THE SPI SPI ACCESSIBLE FEATURES MEMORY MAP READING THE MEMORY MAP REGISTER TABLE Open Locations Default Values Logic Levels Transfer Register Map Channel-Specific Registers MEMORY MAP REGISTER TABLE MEMORY MAP REGISTER DESCRIPTIONS Voltage Reference (Register 0x18) Bits[7:5]—Reserved Bits[4:0]—Voltage Reference APPLICATIONS INFORMATION DESIGN GUIDELINES Power and Ground Recommendations Exposed Paddle Thermal Heat Sink Recommendations VCM RBIAS Reference Decoupling SPI Port OUTLINE DIMENSIONS ORDERING GUIDE