Datasheet AD8283 (Analog Devices) - 10

AD8283 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS
VS = 3.3 V, 1.8 V, TA = 25°C, FS = 72 MSPS, RIN =200 kΩ, VREF = 1.0 V.
50 40 38 40 36 34dB 34 ) 32 30 28dB 30 22dB S (% E 28 20 16dB C 26 ) 24 B 10 d DEVI 22 ( F IN 20 0 E O 18 GA G A 16 T –10 14 CEN 12 10 –20 PER 8 6 –30 4 2 –40 0
3
0.1 1 10 100
014
33.50 33.66 33.82 33.98 34.14 34.30 34.46
03
33.58 33.74 33.90 34.06 34.22 34.38 FREQUENCY (MHz)
795- 09795-
(LSB)
09 Figure 4. Channel Gain vs. Frequency Figure 7. Gain Error Histogram (Gain = 34 dB)
1.0 20 34dB 19 28dB 0.8 22dB 18 16dB 17 0.6 ) % 16 15 0.4 ES ( 14 B) 13 d 0.2 EVIC 12 R ( D F 11 0 10 ERRO E O 9 G IN –0.2 A 8 A T G N 7 –0.4 E C 6 R 5 E –0.6 P 4 3 –0.8 2 1 –1.0 0 –40 –15 10 35 60 85 0 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20 0.22 0.24
038 034
0.01 0.03 0.05 0.07 0.09 0.11 0.13 0.15 0.17 0.19 0.21 0.23 0.25 TEMPERATURE (°C) (dB)
09795- 09795- Figure 5. Gain Error vs. Temperature at All Gains Figure 8. Channel-to-Channel Gain Matching (Gain = 16 dB)
40 10 38 36 9 34 ) 32 ) % 8 % 30 S ( 28 E 7 CES ( 26 IC V 24 E 6 DEVI D F 22 20 5 E O 18 G GE OF A 16 4 T A T N 14 E 12 EN C 3 10 R PERC 8 PE 2 6 4 1 2 0 0 16.00 16.16 16.32 16.48 16.64 16.8 16.96
32
0 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20 0.22 0.24 16.08 16.24 16.4 16.56 16.72 16.88
-0 035
0.01 0.03 0.05 0.07 0.09 0.11 0.13 0.15 0.17 0.19 0.21 0.23 0.25
95-
(dB)
9795 0
(dB)
097 Figure 6. Gain Error Histogram (Gain = 16 dB) Figure 9. Channel-to-Channel Gain Matching (Gain = 34 dB) Rev. C | Page 10 of 27 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications AC Specifications Digital Specifications Switching Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Radar Receive Path AFE Channel Overview Low Noise Amplifier (LNA) Recommendation Antialiasing Filter (AAF) Mux and Mux Controller ADC Clock Input Considerations Clock Duty Cycle Considerations Clock Jitter Considerations SDIO Pin SCLK Pin CS Pin RBIAS Pin Voltage Reference Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations Serial Peripheral Interface (SPI) Hardware Interface Memory Map Reading the Memory Map Table Logic Levels Reserved Locations Default Values Application Diagrams Outline Dimensions Ordering Guide Automotive Products