Datasheet AD8285 (Analog Devices) - 9

FabricanteAnalog Devices
DescripciónRadar Receive Path AFE: 4-Channel LNA/PGA/AAF with ADC
Páginas / Página27 / 9 — Data Sheet. AD8285. Pin No. Mnemonic. Description
RevisiónB
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Data Sheet. AD8285. Pin No. Mnemonic. Description

Data Sheet AD8285 Pin No Mnemonic Description

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Data Sheet AD8285 Pin No. Mnemonic Description
24 AVDD33C 3.3 V Analog Supply for Channel C. 25 INC− Negative LNA Analog Input for Channel C. 26 INC+ Positive LNA Analog Input for Channel C. 27 AVDD33D 3.3 V Analog Supply for Channel D. 28 IND− Negative LNA Analog Input for Channel D. 29 IND+ Positive LNA Analog Input for Channel D. 30 AVDD33 3.3 V Analog Supply. 31 NC No Connect. Do not connect to this pin. 32 NC No Connect. Do not connect to this pin. 33 AVDD33 3.3 V Analog Supply. 34 NC No Connect. Do not connect to this pin. 35 NC No Connect. Do not connect to this pin. 36 NC No Connect. Do not connect to this pin. 37 NC No Connect. Do not connect to this pin. 38 INADC− Negative Analog Input for Alternate Channel D (ADC Only). 39 INADC+ Positive Analog Input for Alternate Channel D (ADC Only). 40 AVDD18 1.8 V Analog Supply. 41 AVDD18ADC 1.8 V Analog Supply for ADC. 42 TEST3 Test. Do not use the TEST3 pin; tie it to ground. 43 ANOUT Analog Outputs. The ANOUT pin is for debug purposes only. Leave this pin floating. 44 APOUT Analog Outputs. The APOUT pin is for debug purposes only. Leave this pin floating. 45 BAND Band Gap Voltage. The BAND pin is for debug purposes only. Leave this pin floating. 46 RBIAS External Resistor. The RBIAS pin sets the internal ADC core bias current. 47 VREF Voltage Reference Input/Output. 48 AVDD33REF 3.3 V Analog Supply for References. 49 DVDD33CLK 3.3 V Digital Supply for Clock. 50 CLK− Clock Input Complement. 51 CLK+ Clock Input True. 52 DVDD18CLK 1.8 V Digital Supply for Clock. 53 TEST4 Test. Do not use the TEST4 pin; tie it to ground. 54 NC No Connect. Do not connect to this pin. 55 NC No Connect. Do not connect to this pin. 56 DVDD33DRV 3.3 V Digital Supply for Output Driver. 57 D11 ADC Data Output 11 (MSB). 58 D10 ADC Data Output 10. 59 D9 ADC Data Output 9. 60 D8 ADC Data Output 8. 61 D7 ADC Data Output 7. 62 D6 ADC Data Output 6. 63 D5 ADC Data Output 5. 64 D4 ADC Data Output 4. 65 D3 ADC Data Output 3. 66 D2 ADC Data Output 2. 67 D1 ADC Data Output 1. 68 D0 ADC Data Output 0 (LSB). 69 NC No Connect. Do not connect to this pin. 70 NC No Connect. Do not connect to this pin. 71 DVDD33DRV 3.3 V Supply for Output Driver. 72 NC No Connect. Do not connect to this pin. Rev. B | Page 9 of 27 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION RADAR RECEIVE PATH AFE CHANNEL OVERVIEW Low Noise Amplifier (LNA) Recommendation Antialiasing Filter (AAF) Mux and Mux Controller ADC CLOCK INPUT CONSIDERATIONS CLOCK DUTY CYCLE CONSIDERATIONS CLOCK JITTER CONSIDERATIONS SDIO PIN SCLK PIN CS\ PIN RBIAS PIN VOLTAGE REFERENCE POWER AND GROUND RECOMMENDATIONS EXPOSED PADDLE THERMAL HEAT SLUG RECOMMENDATIONS SERIAL PERIPHERAL INTERFACE (SPI) HARDWARE INTERFACE MEMORY MAP READING THE MEMORY MAP TABLE LOGIC LEVELS RESERVED LOCATIONS DEFAULT VALUES APPLICATION DIAGRAMS OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS