Datasheet ADRF6520 (Analog Devices) - 6

FabricanteAnalog Devices
DescripciónDual Programmable Filters and VGAs for 2 GHz Channel Spacing for μW Radios
Páginas / Página29 / 6 — ADRF6520. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL …
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ADRF6520. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL RESISTANCE. Parameter. Rating. Table 3. Thermal Resistance

ADRF6520 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 2 THERMAL RESISTANCE Parameter Rating Table 3 Thermal Resistance

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ADRF6520 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL RESISTANCE Parameter Rating
Thermal performance is directly linked to printed circuit board Supply Voltages, VPS, VPSD 3.6 V (PCB) design and operating environment. Careful attention to ENBL, LE, CLK, DATA, SDIO VPSD + 0.5 V PCB thermal design is required. INP1, INM1, INP2, INM2, VPS + 0.5 V OPP1, OPM1, OPP2, OPM2 VPS + 0.5 V
Table 3. Thermal Resistance 1 2
OFS1, OFS2, VRMS VPS + 0.5 V
Package Type θJA θJC Unit
VGN1, VGN2 VPS + 0.5 V CP-32-12 29.4 2.0 °C/W Internal Power Dissipation 1.53 W 1 Based on simulation with JEDEC standard JESD51, using a 2S2P board. Maximum Junction Temperature 125°C 2 Based on simulation with JEDEC standard JESD51, using a 1S0P board. Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C
ESD CAUTION
Lead Temperature (Soldering 60 sec) 300°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. 0 | Page 6 of 29 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INPUT VGAs RMS DETECTOR PROGRAMMABLE FILTERS Bypassing the Filters VARIABLE GAIN AMPLIFIERS OUTPUT BUFFERS/ADC DRIVERS DC OFFSET COMPENSATION LOOP PROGRAMMING THE ADRF6520 NOISE CHARACTERISTICS DISTORTION CHARACTERISTICS MAXIMIZING THE DYNAMIC RANGE KEY PARAMETERS FOR QUADRATURE-BASED RECEIVERS SPI REGISTER AND TIMING REGISTER READ/WRITE TIMING Write Cycle Read Cycle APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DC OFFSET COMPENSATION LOOP ENABLED SERIAL PORT CONNECTIONS ENABLE/DISABLE FUNCTION GAIN PIN DECOUPLING RMS DETECTOR CONNECTIONS VGA2 GAIN STEP RESPONSE LINEAR OPERATION OF THE ADRF6520 EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE