Key Sheet AD7792, AD7793 (Analog Devices) - 5

Key Sheet AD7792/AD7793 FREQUENTLY ASKED QUESTIONS What is the optional internal buffer?
refer to the AD7792/AD7793 data sheet for information about The multiplexed input channels of the AD7792/AD7793 are the absolute maximum ratings. • Connected to the on-chip buffer amplifier when either device
Is an antialiasing filter required?
is operated in buffered mode or when the gain is greater than 2 The analog input is sampled at 128 kHz (that is, on each edge of • Connected directly to the modulator when either device is the master clock). The digital filter does not provide any operated in unbuffered mode at a gain of 1 or 2. rejection at this frequency or at frequencies that are multiples of 128 kHz; an external antialiasing filter is required to provide In buffered mode, the input channel feeds into a high rejection at these frequencies, with a simple RC filter being impedance input stage of the buffer amplifier. Therefore, the sufficient. Typical values for the filter are input can tolerate significant ranges of source impedances and is tailored for direct connection to external resistive-type • 1 kΩ resistor in series with each analog input sensors, such as strain gauges or resistance temperature • 0.1 µF capacitor between the analog input pins detectors (RTDs). • 0.01 µF capacitor from each input pin to ground
What digital filter options are available?
These typical values can be used only when the buffer is The AD7792/AD7793 use slightly different filter types, enabled. When the buffer is disabled, smaller RC values are depending on the output data rate (ODR), to optimize the required because larger values can cause gain errors. rejection of quantization noise and device noise. When the
Can filtering be added to the reference pins?
ODR is from 4.17 SPS to 12.5 SPS, a Sinc3 filter along with an The reference input to the AD7792/AD7793 is not buffered. averaging filter is used. When the ODR is from 16.7 SPS to 39 SPS, Therefore, the filtering must be limited on the reference pins a modified Sinc3 filter is used. This filter provides simultaneous because large RC values can cause gain errors. The AD7792/ 50 Hz and 60 Hz rejection when the ODR equals 16.7 SPS. A Sinc4 AD7793 data sheet lists acceptable RC values for use when the filter is used when the ODR is from 50 SPS to 242 SPS. Finally, analog inputs are unbuffered. Similar values should be used on an integrate only filter is used when the ODR equals 470 SPS. the reference pins.
What is 50 Hz and 60 Hz rejection? What is the instrumentation amplifier?
The mains power supply generates interference at 50 Hz or Amplifying the analog input signal by a gain of 1 or 2 is performed 60 Hz, with the frequency varying from one country to another. in the modulator. However, when the gain equals 4 or higher, the The AD7792/AD7793 have the ability to simultaneously reject output from the buffer is applied to the input of the on-chip 50 Hz and 60 Hz signals. Simultaneous 50 Hz and 60 Hz rejection instrumentation amplifier. This low noise in-amp means that is obtained when the ODR is set to 16.7 SPS. signals of small amplitude can be gained within the AD7792/
How do I interface with the part?
AD7793 while still maintaining excellent noise performance. The part can be configured by using a 4-wire SPI interface; this
What calibration options are available?
interface is also used as the data interface. The SPI interface allows The AD7792/AD7793 provide four calibration modes that can the user to read the status of the part and to change the setup. be programmed via the mode bits in the mode register: internal
Are there any ESD protection schemes that should be
zero-scale calibration, internal ful -scale calibration, system zero-
considered for the AD7792/ AD7793?
scale calibration, and system full-scale calibration, which effectively These converters are manufactured on a standard CMOS reduces the offset error and ful -scale error to the order of the process; therefore, all standard practices and protection noise. After each conversion, the ADC con-version result is scaled schemes that apply to other CMOS devices also apply to these using the ADC calibration registers before being written to the devices. There are ESD protection diodes on al the inputs that data register. The offset calibration coefficient is subtracted from protect the device from possible ESD damage due to handling the result prior to multiplication by the ful -scale coefficient. and production. To determine the appropriate ESD precautions, Rev. 0 | Page 5 of 6 Document Outline General Description Features and Benefits Key Characteristics Fundamental Specifications Noise Operating the AD7792/AD7793 Data Interface Data Modes Continuous Conversion Mode (Default) Continuous Read Mode Single Conversion Mode Typical Application Diagram Frequently Asked Questions Learn More and Start Designing Compatible Devices Package Diagram Getting Started