Enhanced ProductADAS3022-EPTiming Diagrams500µAIOL70% VIO30% VIOtDELAYtDELAYTO SDO1.4VC2V OR VIO – 0.5V12V OR VIO – 0.5V1L50pF0.8V OR 0.5V20.8V OR 0.5V2 03 0 500µAI -002 1OH2V IF VIO > 2.5V; VIO – 0.5V IF VIO < 2.5V. 3- 983 2 598 15 0.8V IF VIO > 2.5V; 0.5V IF VIO < 2.5V. 1 Figure 2. Load Circuit for Digital Interface Timing Figure 3. Voltage Levels for Timing ttACQCYCSOCEOCSOCEOCttPOWERDDCQUIETtDACUPNOTE 1NOTE 2NOTE 1CONVERSION (n – 1)ACQUISITION (n)CONVERSION (n)ACQUISITION (n + 1)PHASECONVERSION (n + 1)UNDEFINEDUNDEFINEDUNDEFINEDUNDEFINEDUNDEFINEDCNVBUSYtNOTE 5DDCANOTE 2tADNOTE 4CSX116/32116SCKNOTE 3CFGDINCFG (n + 2)CFG (n + 2)CFG (n + 3)CFG (n + 3)INVALIDDATADATA (n – 1)DATA (n – 1)DATA (n)DATA (n)SDOINVALIDINVALIDINVALIDINVALIDINVALIDEOCEOCEOCACQUISITIONCONVERSIONACQUISITIONCONVERSIONACQUISITIONCONVERSIONPHASE(n + 2)(n + 2)(n + 3)(n + 3)(n + 4)(n + 4)CNVBUSYCS1161161SCKDINCFG (n + 4)CFG (n + 4)CFG (n + 5)CFG (n + 5)CFG (n + 6)CFG (n + 6)DATA (n + 1)SDODATA (n + 1)DATA (n + 2)DATA (n + 2)DATA (n + 3)DATA (n + 3)INVALIDINVALIDNOTES 1. DATA ACCESS CAN OCCUR DURING A CONVERSION ( tDDC), AFTER A CONVERSION (tDAC), OR BOTH DURING AND AFTER A CONVERSION. THE CONVERSION RESULT AND THE CFG REGISTER ARE UPDATED AT THE END OF A CONVERSION (EOC).2. DATA ACCESS CAN ALSO OCCUR UP TO tDDCA WHILE BUSY IS ACTIVE (SEE THE ADAS3022 DATA SHEET FOR DETAILS). ALL OF THE BUSYTIME CAN BE USED TO ACQUIRE DATA.3. A TOTAL OF 16 SCK FALLING EDGES IS REQUIRED FOR A CONVERSION RESULT. AN ADDITIONAL 16 EDGES ARE REQUIRED TO READ BACK THE CFG RESULT ASSOCIATED WITH THE CURRENT CONVERSION.4. CS CAN BE HELD LOW OR CONNECTED TO CNV. CS WITH FULL INDEPENDENT CONTROL IS SHOWN IN THIS FIGURE. 5. FOR OPTIMAL PERFORMANCE, DATA ACCESS SHOULD NOT OCCUR DURING THE SAMPLING EDGE. A MINIMUM TIME 028 83- OF THE APERTURE DELAY (tAD) SHOULD ELAPSE PRIOR TO DATA ACCESS. 159 Figure 4. General Timing Diagram Rev. 0 | Page 9 of 21 Document Outline Features Enhanced Features Applications General Description Table of Contents Revision History Functional Block Diagram Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Outline Dimensions Ordering Guide